pplib4            216 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 	struct _ATOM_PPLIB_POWERPLAYTABLE4 pplib4;
pplib4            330 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {
pplib4            333 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));
pplib4            341 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {
pplib4            344 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));
pplib4            352 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {
pplib4            355 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));
pplib4            363 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {
pplib4            366 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));
pplib4            374 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {
pplib4            378 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));
pplib4            392 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {
pplib4            396 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));
pplib4             81 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct _ATOM_PPLIB_POWERPLAYTABLE4 pplib4;
pplib4            810 drivers/gpu/drm/radeon/r600_dpm.c 	struct _ATOM_PPLIB_POWERPLAYTABLE4 pplib4;
pplib4            922 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {
pplib4            925 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));
pplib4            931 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {
pplib4            934 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));
pplib4            942 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {
pplib4            945 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));
pplib4            954 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {
pplib4            957 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));
pplib4            967 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {
pplib4            971 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));
pplib4            985 drivers/gpu/drm/radeon/r600_dpm.c 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {
pplib4            989 drivers/gpu/drm/radeon/r600_dpm.c 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));