pp_offset         160 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c 	static const u32 pp_offset[PINGPONG_MAX] = {0xC, 0x8, 0x4, 0x13, 0x18};
pp_offset         170 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c 		if (pp_idx >= ARRAY_SIZE(pp_offset))
pp_offset         173 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c 		reg &= ~(0xf << pp_offset[pp_idx]);
pp_offset         174 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c 		reg |= (cfg->vsync_source & 0xf) << pp_offset[pp_idx];
pp_offset         461 drivers/misc/cxl/cxl.h 	u64 pp_offset;
pp_offset         547 drivers/misc/cxl/native.c 			(ctx->afu->native->pp_offset + ctx->afu->pp_size * ctx->pe);
pp_offset         862 drivers/misc/cxl/pci.c 		afu->native->pp_offset = AFUD_READ_PPPSA_OFF(afu);
pp_offset         893 drivers/misc/cxl/pci.c 			(afu->native->pp_offset + afu->pp_size*afu->max_procs_virtualised)) {
pp_offset         215 drivers/misc/cxl/sysfs.c 	return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->native->pp_offset);