pp_ctl           6381 drivers/gpu/drm/i915/display/intel_dp.c 	u32 pp_on, pp_off, pp_ctl;
pp_ctl           6386 drivers/gpu/drm/i915/display/intel_dp.c 	pp_ctl = ironlake_get_pp_control(intel_dp);
pp_ctl           6390 drivers/gpu/drm/i915/display/intel_dp.c 		I915_WRITE(regs.pp_ctrl, pp_ctl);
pp_ctl           6408 drivers/gpu/drm/i915/display/intel_dp.c 		seq->t11_t12 = REG_FIELD_GET(BXT_POWER_CYCLE_DELAY_MASK, pp_ctl) * 1000;
pp_ctl           6607 drivers/gpu/drm/i915/display/intel_dp.c 		u32 pp_ctl;
pp_ctl           6609 drivers/gpu/drm/i915/display/intel_dp.c 		pp_ctl = I915_READ(regs.pp_ctrl);
pp_ctl           6610 drivers/gpu/drm/i915/display/intel_dp.c 		pp_ctl &= ~BXT_POWER_CYCLE_DELAY_MASK;
pp_ctl           6611 drivers/gpu/drm/i915/display/intel_dp.c 		pp_ctl |= REG_FIELD_PREP(BXT_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(seq->t11_t12, 1000));
pp_ctl           6612 drivers/gpu/drm/i915/display/intel_dp.c 		I915_WRITE(regs.pp_ctrl, pp_ctl);