powerplay_table4 1328 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		const ATOM_PPLIB_POWERPLAYTABLE4 *powerplay_table4 =
powerplay_table4 1330 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (0 != powerplay_table4->usVddcDependencyOnSCLKOffset) {
powerplay_table4 1332 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long) powerplay_table4) +
powerplay_table4 1333 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				 le16_to_cpu(powerplay_table4->usVddcDependencyOnSCLKOffset));
powerplay_table4 1338 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (result == 0 && (0 != powerplay_table4->usVddciDependencyOnMCLKOffset)) {
powerplay_table4 1340 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long) powerplay_table4) +
powerplay_table4 1341 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				 le16_to_cpu(powerplay_table4->usVddciDependencyOnMCLKOffset));
powerplay_table4 1346 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (result == 0 && (0 != powerplay_table4->usVddcDependencyOnMCLKOffset)) {
powerplay_table4 1348 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long) powerplay_table4) +
powerplay_table4 1349 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				 le16_to_cpu(powerplay_table4->usVddcDependencyOnMCLKOffset));
powerplay_table4 1354 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (result == 0 && (0 != powerplay_table4->usMaxClockVoltageOnDCOffset)) {
powerplay_table4 1356 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long) powerplay_table4) +
powerplay_table4 1357 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				 le16_to_cpu(powerplay_table4->usMaxClockVoltageOnDCOffset));
powerplay_table4 1373 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (result == 0 && (0 != powerplay_table4->usMvddDependencyOnMCLKOffset)) {
powerplay_table4 1375 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long) powerplay_table4) +
powerplay_table4 1376 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				 le16_to_cpu(powerplay_table4->usMvddDependencyOnMCLKOffset));
powerplay_table4 1534 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		const ATOM_PPLIB_POWERPLAYTABLE4 *powerplay_table4 =
powerplay_table4 1537 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 		if (0 != powerplay_table4->usVddcPhaseShedLimitsTableOffset) {
powerplay_table4 1540 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				(((unsigned long)powerplay_table4) +
powerplay_table4 1541 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c 				le16_to_cpu(powerplay_table4->usVddcPhaseShedLimitsTableOffset));