power_well 177 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 179 drivers/gpu/drm/i915/display/intel_display_power.c DRM_DEBUG_KMS("enabling %s\n", power_well->desc->name); power_well 180 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->ops->enable(dev_priv, power_well); power_well 181 drivers/gpu/drm/i915/display/intel_display_power.c power_well->hw_enabled = true; power_well 185 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 187 drivers/gpu/drm/i915/display/intel_display_power.c DRM_DEBUG_KMS("disabling %s\n", power_well->desc->name); power_well 188 drivers/gpu/drm/i915/display/intel_display_power.c power_well->hw_enabled = false; power_well 189 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->ops->disable(dev_priv, power_well); power_well 193 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 195 drivers/gpu/drm/i915/display/intel_display_power.c if (!power_well->count++) power_well 196 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_well_enable(dev_priv, power_well); power_well 200 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 202 drivers/gpu/drm/i915/display/intel_display_power.c WARN(!power_well->count, "Use count on power well %s is already zero", power_well 203 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name); power_well 205 drivers/gpu/drm/i915/display/intel_display_power.c if (!--power_well->count) power_well 206 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_well_disable(dev_priv, power_well); power_well 224 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 232 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain)) { power_well 233 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->always_on) power_well 236 drivers/gpu/drm/i915/display/intel_display_power.c if (!power_well->hw_enabled) { power_well 316 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 318 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 319 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 325 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name); power_well 328 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON(!power_well->desc->hsw.is_tc_tbt); power_well 349 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 351 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 352 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 372 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name, power_well 385 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 387 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 388 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 389 drivers/gpu/drm/i915/display/intel_display_power.c bool wait_fuses = power_well->desc->hsw.has_fuses; power_well 409 drivers/gpu/drm/i915/display/intel_display_power.c hsw_wait_for_power_well_enable(dev_priv, power_well); power_well 424 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->hsw.irq_pipe_mask, power_well 425 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->hsw.has_vga); power_well 429 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 431 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 432 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 436 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->hsw.irq_pipe_mask); power_well 440 drivers/gpu/drm/i915/display/intel_display_power.c hsw_wait_for_power_well_disable(dev_priv, power_well); power_well 447 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 449 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 450 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 463 drivers/gpu/drm/i915/display/intel_display_power.c hsw_wait_for_power_well_enable(dev_priv, power_well); power_well 482 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 484 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 485 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 497 drivers/gpu/drm/i915/display/intel_display_power.c hsw_wait_for_power_well_disable(dev_priv, power_well); power_well 507 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 509 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 511 drivers/gpu/drm/i915/display/intel_display_power.c return power_well->desc->hsw.is_tc_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) : power_well 520 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 522 drivers/gpu/drm/i915/display/intel_display_power.c int refs = hweight64(power_well->desc->domains & power_well 525 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON(refs > power_well->count); power_well 531 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 533 drivers/gpu/drm/i915/display/intel_display_power.c enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); power_well 538 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well_async_ref_count(dev_priv, power_well) == power_well 539 drivers/gpu/drm/i915/display/intel_display_power.c power_well->count) power_well 542 drivers/gpu/drm/i915/display/intel_display_power.c aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); power_well 575 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 583 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 585 drivers/gpu/drm/i915/display/intel_display_power.c enum aux_ch aux_ch = icl_tc_phy_aux_ch(dev_priv, power_well); power_well 588 drivers/gpu/drm/i915/display/intel_display_power.c icl_tc_port_assert_ref_held(dev_priv, power_well); power_well 592 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->hsw.is_tc_tbt) power_well 596 drivers/gpu/drm/i915/display/intel_display_power.c hsw_power_well_enable(dev_priv, power_well); power_well 601 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 603 drivers/gpu/drm/i915/display/intel_display_power.c icl_tc_port_assert_ref_held(dev_priv, power_well); power_well 605 drivers/gpu/drm/i915/display/intel_display_power.c hsw_power_well_disable(dev_priv, power_well); power_well 614 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 616 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 617 drivers/gpu/drm/i915/display/intel_display_power.c enum i915_power_well_id id = power_well->desc->id; power_well 618 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 825 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 827 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(dev_priv, power_well) power_well 828 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->id == power_well_id) power_well 829 drivers/gpu/drm/i915/display/intel_display_power.c return power_well; power_well 895 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 897 drivers/gpu/drm/i915/display/intel_display_power.c const struct i915_power_well_regs *regs = power_well->desc->hsw.regs; power_well 898 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->hsw.idx; power_well 913 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 915 drivers/gpu/drm/i915/display/intel_display_power.c bxt_ddi_phy_init(dev_priv, power_well->desc->bxt.phy); power_well 919 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 921 drivers/gpu/drm/i915/display/intel_display_power.c bxt_ddi_phy_uninit(dev_priv, power_well->desc->bxt.phy); power_well 925 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 927 drivers/gpu/drm/i915/display/intel_display_power.c return bxt_ddi_phy_is_enabled(dev_priv, power_well->desc->bxt.phy); power_well 932 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 934 drivers/gpu/drm/i915/display/intel_display_power.c power_well = lookup_power_well(dev_priv, BXT_DISP_PW_DPIO_CMN_A); power_well 935 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->count > 0) power_well 936 drivers/gpu/drm/i915/display/intel_display_power.c bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy); power_well 938 drivers/gpu/drm/i915/display/intel_display_power.c power_well = lookup_power_well(dev_priv, VLV_DISP_PW_DPIO_CMN_BC); power_well 939 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->count > 0) power_well 940 drivers/gpu/drm/i915/display/intel_display_power.c bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy); power_well 943 drivers/gpu/drm/i915/display/intel_display_power.c power_well = lookup_power_well(dev_priv, power_well 945 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->count > 0) power_well 947 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->bxt.phy); power_well 952 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 991 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 997 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1009 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1014 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1019 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1025 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1034 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1041 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1048 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1050 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->count > 0) power_well 1051 drivers/gpu/drm/i915/display/intel_display_power.c i830_pipes_power_well_enable(dev_priv, power_well); power_well 1053 drivers/gpu/drm/i915/display/intel_display_power.c i830_pipes_power_well_disable(dev_priv, power_well); power_well 1057 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well, bool enable) power_well 1059 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->vlv.idx; power_well 1093 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1095 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, true); power_well 1099 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1101 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, false); power_well 1105 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1107 drivers/gpu/drm/i915/display/intel_display_power.c int pw_idx = power_well->desc->vlv.idx; power_well 1233 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1235 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, true); power_well 1241 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1245 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, false); power_well 1249 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1254 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, true); power_well 1271 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1281 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, false); power_well 1394 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1400 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON_ONCE(power_well->desc->id != VLV_DISP_PW_DPIO_CMN_BC && power_well 1401 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->id != CHV_DISP_PW_DPIO_CMN_D); power_well 1403 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) { power_well 1413 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, true); power_well 1428 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) { power_well 1455 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1459 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON_ONCE(power_well->desc->id != VLV_DISP_PW_DPIO_CMN_BC && power_well 1460 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->id != CHV_DISP_PW_DPIO_CMN_D); power_well 1462 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->desc->id == VLV_DISP_PW_DPIO_CMN_BC) { power_well 1474 drivers/gpu/drm/i915/display/intel_display_power.c vlv_set_power_well(dev_priv, power_well, false); power_well 1609 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1638 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well, power_well 1672 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1674 drivers/gpu/drm/i915/display/intel_display_power.c chv_set_pipe_power_well(dev_priv, power_well, true); power_well 1680 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well) power_well 1684 drivers/gpu/drm/i915/display/intel_display_power.c chv_set_pipe_power_well(dev_priv, power_well, false); power_well 1814 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 1819 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain)) power_well 1820 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_well_get(dev_priv, power_well); power_well 1898 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 1912 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain)) power_well 1913 drivers/gpu/drm/i915/display/intel_display_power.c intel_power_well_put(dev_priv, power_well); power_well 2895 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 2898 drivers/gpu/drm/i915/display/intel_display_power.c power_well = lookup_power_well(dev_priv, power_well_id); power_well 2899 drivers/gpu/drm/i915/display/intel_display_power.c ret = power_well->desc->ops->is_enabled(dev_priv, power_well); power_well 4096 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 4099 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(dev_priv, power_well) { power_well 4100 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->ops->sync_hw(dev_priv, power_well); power_well 4101 drivers/gpu/drm/i915/display/intel_display_power.c power_well->hw_enabled = power_well 4102 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->ops->is_enabled(dev_priv, power_well); power_well 5106 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 5108 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(i915, power_well) { power_well 5112 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name, power_well->count); power_well 5114 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain(domain, power_well->desc->domains) power_well 5135 drivers/gpu/drm/i915/display/intel_display_power.c struct i915_power_well *power_well; power_well 5143 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_well(i915, power_well) { power_well 5148 drivers/gpu/drm/i915/display/intel_display_power.c enabled = power_well->desc->ops->is_enabled(i915, power_well); power_well 5149 drivers/gpu/drm/i915/display/intel_display_power.c if ((power_well->count || power_well->desc->always_on) != power_well 5152 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name, power_well 5153 drivers/gpu/drm/i915/display/intel_display_power.c power_well->count, enabled); power_well 5156 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain(domain, power_well->desc->domains) power_well 5159 drivers/gpu/drm/i915/display/intel_display_power.c if (power_well->count != domains_count) { power_well 5162 drivers/gpu/drm/i915/display/intel_display_power.c power_well->desc->name, power_well->count, power_well 133 drivers/gpu/drm/i915/display/intel_display_power.h struct i915_power_well *power_well); power_well 140 drivers/gpu/drm/i915/display/intel_display_power.h struct i915_power_well *power_well); power_well 146 drivers/gpu/drm/i915/display/intel_display_power.h struct i915_power_well *power_well); power_well 149 drivers/gpu/drm/i915/display/intel_display_power.h struct i915_power_well *power_well); power_well 152 drivers/gpu/drm/i915/display/intel_hdcp.c struct i915_power_well *power_well; power_well 168 drivers/gpu/drm/i915/display/intel_hdcp.c for_each_power_well(dev_priv, power_well) { power_well 169 drivers/gpu/drm/i915/display/intel_hdcp.c if (power_well->desc->id == id) { power_well 170 drivers/gpu/drm/i915/display/intel_hdcp.c enabled = power_well->desc->ops->is_enabled(dev_priv, power_well 171 drivers/gpu/drm/i915/display/intel_hdcp.c power_well); power_well 2354 drivers/gpu/drm/i915/i915_debugfs.c struct i915_power_well *power_well; power_well 2357 drivers/gpu/drm/i915/i915_debugfs.c power_well = &power_domains->power_wells[i]; power_well 2358 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "%-25s %d\n", power_well->desc->name, power_well 2359 drivers/gpu/drm/i915/i915_debugfs.c power_well->count); power_well 2361 drivers/gpu/drm/i915/i915_debugfs.c for_each_power_domain(power_domain, power_well->desc->domains)