power_tune_table 680 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c pt = &ppt->power_tune_table; power_tune_table 686 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c pt = &ppt->power_tune_table; power_tune_table 701 drivers/gpu/drm/amd/include/pptable.h ATOM_PowerTune_Table power_tune_table; power_tune_table 707 drivers/gpu/drm/amd/include/pptable.h ATOM_PowerTune_Table power_tune_table; power_tune_table 1312 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c &tune_table->power_tune_table, power_tune_table 1322 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c &tune_table->power_tune_table, 255); power_tune_table 430 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c const ATOM_Vega10_PowerTune_Table *power_tune_table; power_tune_table 442 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c power_tune_table = (ATOM_Vega10_PowerTune_Table *)table; power_tune_table 443 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->usMaximumPowerDeliveryLimit = le16_to_cpu(power_tune_table->usSocketPowerLimit); power_tune_table 444 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->usTDC = le16_to_cpu(power_tune_table->usTdcLimit); power_tune_table 445 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->usEDCLimit = le16_to_cpu(power_tune_table->usEdcLimit); power_tune_table 447 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usSoftwareShutdownTemp); power_tune_table 449 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitTedge); power_tune_table 451 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitHotSpot); power_tune_table 453 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitLiquid1); power_tune_table 455 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitLiquid2); power_tune_table 457 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitHBM); power_tune_table 459 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitVrSoc); power_tune_table 461 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitVrMem); power_tune_table 463 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c le16_to_cpu(power_tune_table->usTemperatureLimitPlx); power_tune_table 464 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucLiquid1_I2C_address = power_tune_table->ucLiquid1_I2C_address; power_tune_table 465 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucLiquid2_I2C_address = power_tune_table->ucLiquid2_I2C_address; power_tune_table 466 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucLiquid_I2C_Line = power_tune_table->ucLiquid_I2C_LineSCL; power_tune_table 467 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucLiquid_I2C_LineSDA = power_tune_table->ucLiquid_I2C_LineSDA; power_tune_table 468 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucVr_I2C_address = power_tune_table->ucVr_I2C_address; power_tune_table 469 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucVr_I2C_Line = power_tune_table->ucVr_I2C_LineSCL; power_tune_table 470 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucVr_I2C_LineSDA = power_tune_table->ucVr_I2C_LineSDA; power_tune_table 471 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucPlx_I2C_address = power_tune_table->ucPlx_I2C_address; power_tune_table 472 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucPlx_I2C_Line = power_tune_table->ucPlx_I2C_LineSCL; power_tune_table 473 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c tdp_table->ucPlx_I2C_LineSDA = power_tune_table->ucPlx_I2C_LineSDA; power_tune_table 474 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c hwmgr->platform_descriptor.LoadLineSlope = le16_to_cpu(power_tune_table->usLoadLineResistance); power_tune_table 914 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c const Vega10_PPTable_Generic_SubTable_Header *power_tune_table = power_tune_table 973 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c power_tune_table); power_tune_table 516 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; power_tune_table 517 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; power_tune_table 518 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 519 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 531 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 533 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 535 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; power_tune_table 554 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; power_tune_table 570 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.FuzzyFan_PwmSetDelta = CONVERT_FROM_HOST_TO_SMC_US(tmp); power_tune_table 579 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint8_t *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd; power_tune_table 580 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd; power_tune_table 581 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint8_t *hi2_vid = smu_data->power_tune_table.BapmVddCVidHiSidd2; power_tune_table 608 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint8_t *vid = smu_data->power_tune_table.VddCVid; power_tune_table 624 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c u8 *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd; power_tune_table 625 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c u8 *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd; power_tune_table 647 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.GnbLPMLMaxVid = (u8)max; power_tune_table 648 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.GnbLPMLMinVid = (u8)min; power_tune_table 656 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint16_t HiSidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 657 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint16_t LoSidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 663 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 665 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 707 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 69 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.h struct SMU7_Discrete_PmFuses power_tune_table; power_tune_table 575 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; power_tune_table 576 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; power_tune_table 577 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 578 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 596 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 598 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 600 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; power_tune_table 619 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; power_tune_table 620 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.LPMLTemperatureMin = power_tune_table 622 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.LPMLTemperatureMax = power_tune_table 624 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff); power_tune_table 636 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.LPMLTemperatureScaler[i] = 0; power_tune_table 653 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.FuzzyFan_PwmSetDelta = power_tune_table 666 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.GnbLPML[i] = 0; power_tune_table 676 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint16_t HiSidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 677 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c uint16_t LoSidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 683 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 685 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 747 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 44 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h struct SMU73_Discrete_PmFuses power_tune_table; power_tune_table 311 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; power_tune_table 312 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddc; power_tune_table 313 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 314 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 326 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 328 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 330 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; power_tune_table 349 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; power_tune_table 366 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.GnbLPML[i] = 0; power_tune_table 374 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint16_t HiSidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 375 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint16_t LoSidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 381 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 383 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 393 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint8_t *hi_vid = smu_data->power_tune_table.BapmVddCVidHiSidd; power_tune_table 394 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint8_t *lo_vid = smu_data->power_tune_table.BapmVddCVidLoSidd; power_tune_table 419 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint8_t *vid = smu_data->power_tune_table.VddCVid; power_tune_table 497 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 63 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h struct SMU71_Discrete_PmFuses power_tune_table; power_tune_table 477 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; power_tune_table 478 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; power_tune_table 479 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 480 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 494 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 496 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 498 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; power_tune_table 517 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; power_tune_table 518 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.LPMLTemperatureMin = power_tune_table 520 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.LPMLTemperatureMax = power_tune_table 522 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff); power_tune_table 534 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.LPMLTemperatureScaler[i] = 0; power_tune_table 549 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.FuzzyFan_PwmSetDelta = PP_HOST_TO_SMC_US( power_tune_table 561 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.GnbLPML[i] = 0; power_tune_table 571 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint16_t hi_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 572 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c uint16_t lo_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 578 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 580 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 637 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 59 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h struct SMU74_Discrete_PmFuses power_tune_table; power_tune_table 1879 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->svi_load_line_en; power_tune_table 1880 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->svi_load_line_vddC; power_tune_table 1881 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 1882 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 1900 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 1902 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 1904 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->tdc_mawt; power_tune_table 1925 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->tdc_waterfall_ctl; power_tune_table 1938 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.LPMLTemperatureScaler[i] = 0; power_tune_table 1954 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.FuzzyFan_PwmSetDelta = power_tune_table 1968 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.GnbLPML[i] = 0; power_tune_table 1979 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint16_t hi_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 1980 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint16_t lo_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 1986 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 1988 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 2054 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 68 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.h struct SMU72_Discrete_PmFuses power_tune_table; power_tune_table 1742 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineEn = defaults->SviLoadLineEn; power_tune_table 1743 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineVddC = defaults->SviLoadLineVddC; power_tune_table 1744 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineTrimVddC = 3; power_tune_table 1745 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.SviLoadLineOffsetVddC = 0; power_tune_table 1759 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TDC_VDDC_PkgLimit = power_tune_table 1761 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TDC_VDDC_ThrottleReleaseLimitPerc = power_tune_table 1763 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TDC_MAWt = defaults->TDC_MAWt; power_tune_table 1782 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.TdcWaterfallCtl = defaults->TdcWaterfallCtl; power_tune_table 1783 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.LPMLTemperatureMin = power_tune_table 1785 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.LPMLTemperatureMax = power_tune_table 1787 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.Reserved = (uint8_t)(temp & 0xff); power_tune_table 1799 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.LPMLTemperatureScaler[i] = 0; power_tune_table 1814 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.FuzzyFan_PwmSetDelta = PP_HOST_TO_SMC_US( power_tune_table 1826 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.GnbLPML[i] = 0; power_tune_table 1836 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint16_t hi_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd; power_tune_table 1837 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c uint16_t lo_sidd = smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd; power_tune_table 1843 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageHiSidd = power_tune_table 1845 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c smu_data->power_tune_table.BapmVddCBaseLeakageLoSidd = power_tune_table 1902 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c (uint8_t *)&smu_data->power_tune_table, power_tune_table 68 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.h struct SMU75_Discrete_PmFuses power_tune_table; power_tune_table 660 drivers/gpu/drm/radeon/pptable.h ATOM_PowerTune_Table power_tune_table; power_tune_table 666 drivers/gpu/drm/radeon/pptable.h ATOM_PowerTune_Table power_tune_table; power_tune_table 1272 drivers/gpu/drm/radeon/r600_dpm.c pt = &ppt->power_tune_table; power_tune_table 1278 drivers/gpu/drm/radeon/r600_dpm.c pt = &ppt->power_tune_table;