power_domains     265 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains;
power_domains     268 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains = &dev_priv->power_domains;
power_domains     270 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains     272 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains     517 drivers/gpu/drm/i915/display/intel_display_power.c static u64 async_put_domains_mask(struct i915_power_domains *power_domains);
power_domains     523 drivers/gpu/drm/i915/display/intel_display_power.c 			     async_put_domains_mask(&dev_priv->power_domains));
power_domains     839 drivers/gpu/drm/i915/display/intel_display_power.c 	return &dev_priv->power_domains.power_wells[0];
power_domains    1200 drivers/gpu/drm/i915/display/intel_display_power.c 	if (dev_priv->power_domains.initializing)
power_domains    1550 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1553 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    1573 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    1582 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1586 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    1605 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    1687 drivers/gpu/drm/i915/display/intel_display_power.c static u64 __async_put_domains_mask(struct i915_power_domains *power_domains)
power_domains    1689 drivers/gpu/drm/i915/display/intel_display_power.c 	return power_domains->async_put_domains[0] |
power_domains    1690 drivers/gpu/drm/i915/display/intel_display_power.c 	       power_domains->async_put_domains[1];
power_domains    1696 drivers/gpu/drm/i915/display/intel_display_power.c assert_async_put_domain_masks_disjoint(struct i915_power_domains *power_domains)
power_domains    1698 drivers/gpu/drm/i915/display/intel_display_power.c 	return !WARN_ON(power_domains->async_put_domains[0] &
power_domains    1699 drivers/gpu/drm/i915/display/intel_display_power.c 			power_domains->async_put_domains[1]);
power_domains    1703 drivers/gpu/drm/i915/display/intel_display_power.c __async_put_domains_state_ok(struct i915_power_domains *power_domains)
power_domains    1708 drivers/gpu/drm/i915/display/intel_display_power.c 	err |= !assert_async_put_domain_masks_disjoint(power_domains);
power_domains    1709 drivers/gpu/drm/i915/display/intel_display_power.c 	err |= WARN_ON(!!power_domains->async_put_wakeref !=
power_domains    1710 drivers/gpu/drm/i915/display/intel_display_power.c 		       !!__async_put_domains_mask(power_domains));
power_domains    1712 drivers/gpu/drm/i915/display/intel_display_power.c 	for_each_power_domain(domain, __async_put_domains_mask(power_domains))
power_domains    1713 drivers/gpu/drm/i915/display/intel_display_power.c 		err |= WARN_ON(power_domains->domain_use_count[domain] != 1);
power_domains    1718 drivers/gpu/drm/i915/display/intel_display_power.c static void print_power_domains(struct i915_power_domains *power_domains,
power_domains    1722 drivers/gpu/drm/i915/display/intel_display_power.c 		container_of(power_domains, struct drm_i915_private,
power_domains    1723 drivers/gpu/drm/i915/display/intel_display_power.c 			     power_domains);
power_domains    1730 drivers/gpu/drm/i915/display/intel_display_power.c 				 power_domains->domain_use_count[domain]);
power_domains    1734 drivers/gpu/drm/i915/display/intel_display_power.c print_async_put_domains_state(struct i915_power_domains *power_domains)
power_domains    1737 drivers/gpu/drm/i915/display/intel_display_power.c 			 power_domains->async_put_wakeref);
power_domains    1739 drivers/gpu/drm/i915/display/intel_display_power.c 	print_power_domains(power_domains, "async_put_domains[0]",
power_domains    1740 drivers/gpu/drm/i915/display/intel_display_power.c 			    power_domains->async_put_domains[0]);
power_domains    1741 drivers/gpu/drm/i915/display/intel_display_power.c 	print_power_domains(power_domains, "async_put_domains[1]",
power_domains    1742 drivers/gpu/drm/i915/display/intel_display_power.c 			    power_domains->async_put_domains[1]);
power_domains    1746 drivers/gpu/drm/i915/display/intel_display_power.c verify_async_put_domains_state(struct i915_power_domains *power_domains)
power_domains    1748 drivers/gpu/drm/i915/display/intel_display_power.c 	if (!__async_put_domains_state_ok(power_domains))
power_domains    1749 drivers/gpu/drm/i915/display/intel_display_power.c 		print_async_put_domains_state(power_domains);
power_domains    1755 drivers/gpu/drm/i915/display/intel_display_power.c assert_async_put_domain_masks_disjoint(struct i915_power_domains *power_domains)
power_domains    1760 drivers/gpu/drm/i915/display/intel_display_power.c verify_async_put_domains_state(struct i915_power_domains *power_domains)
power_domains    1766 drivers/gpu/drm/i915/display/intel_display_power.c static u64 async_put_domains_mask(struct i915_power_domains *power_domains)
power_domains    1768 drivers/gpu/drm/i915/display/intel_display_power.c 	assert_async_put_domain_masks_disjoint(power_domains);
power_domains    1770 drivers/gpu/drm/i915/display/intel_display_power.c 	return __async_put_domains_mask(power_domains);
power_domains    1774 drivers/gpu/drm/i915/display/intel_display_power.c async_put_domains_clear_domain(struct i915_power_domains *power_domains,
power_domains    1777 drivers/gpu/drm/i915/display/intel_display_power.c 	assert_async_put_domain_masks_disjoint(power_domains);
power_domains    1779 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->async_put_domains[0] &= ~BIT_ULL(domain);
power_domains    1780 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->async_put_domains[1] &= ~BIT_ULL(domain);
power_domains    1787 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1790 drivers/gpu/drm/i915/display/intel_display_power.c 	if (!(async_put_domains_mask(power_domains) & BIT_ULL(domain)))
power_domains    1793 drivers/gpu/drm/i915/display/intel_display_power.c 	async_put_domains_clear_domain(power_domains, domain);
power_domains    1797 drivers/gpu/drm/i915/display/intel_display_power.c 	if (async_put_domains_mask(power_domains))
power_domains    1800 drivers/gpu/drm/i915/display/intel_display_power.c 	cancel_delayed_work(&power_domains->async_put_work);
power_domains    1802 drivers/gpu/drm/i915/display/intel_display_power.c 				 fetch_and_zero(&power_domains->async_put_wakeref));
power_domains    1804 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    1813 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1822 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->domain_use_count[domain]++;
power_domains    1840 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1843 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    1845 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    1866 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1874 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    1883 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    1897 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains;
power_domains    1901 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains = &dev_priv->power_domains;
power_domains    1903 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN(!power_domains->domain_use_count[domain],
power_domains    1906 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN(async_put_domains_mask(power_domains) & BIT_ULL(domain),
power_domains    1910 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->domain_use_count[domain]--;
power_domains    1919 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1921 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    1923 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    1947 drivers/gpu/drm/i915/display/intel_display_power.c queue_async_put_domains_work(struct i915_power_domains *power_domains,
power_domains    1950 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN_ON(power_domains->async_put_wakeref);
power_domains    1951 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->async_put_wakeref = wakeref;
power_domains    1953 drivers/gpu/drm/i915/display/intel_display_power.c 				    &power_domains->async_put_work,
power_domains    1958 drivers/gpu/drm/i915/display/intel_display_power.c release_async_put_domains(struct i915_power_domains *power_domains, u64 mask)
power_domains    1961 drivers/gpu/drm/i915/display/intel_display_power.c 		container_of(power_domains, struct drm_i915_private,
power_domains    1962 drivers/gpu/drm/i915/display/intel_display_power.c 			     power_domains);
power_domains    1977 drivers/gpu/drm/i915/display/intel_display_power.c 		async_put_domains_clear_domain(power_domains, domain);
power_domains    1989 drivers/gpu/drm/i915/display/intel_display_power.c 			     power_domains.async_put_work.work);
power_domains    1990 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    1995 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    2001 drivers/gpu/drm/i915/display/intel_display_power.c 	old_work_wakeref = fetch_and_zero(&power_domains->async_put_wakeref);
power_domains    2005 drivers/gpu/drm/i915/display/intel_display_power.c 	release_async_put_domains(power_domains,
power_domains    2006 drivers/gpu/drm/i915/display/intel_display_power.c 				  power_domains->async_put_domains[0]);
power_domains    2009 drivers/gpu/drm/i915/display/intel_display_power.c 	if (power_domains->async_put_domains[1]) {
power_domains    2010 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->async_put_domains[0] =
power_domains    2011 drivers/gpu/drm/i915/display/intel_display_power.c 			fetch_and_zero(&power_domains->async_put_domains[1]);
power_domains    2012 drivers/gpu/drm/i915/display/intel_display_power.c 		queue_async_put_domains_work(power_domains,
power_domains    2017 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    2019 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    2041 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    2045 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    2047 drivers/gpu/drm/i915/display/intel_display_power.c 	if (power_domains->domain_use_count[domain] > 1) {
power_domains    2053 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN_ON(power_domains->domain_use_count[domain] != 1);
power_domains    2056 drivers/gpu/drm/i915/display/intel_display_power.c 	if (power_domains->async_put_wakeref) {
power_domains    2057 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->async_put_domains[1] |= BIT_ULL(domain);
power_domains    2059 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->async_put_domains[0] |= BIT_ULL(domain);
power_domains    2060 drivers/gpu/drm/i915/display/intel_display_power.c 		queue_async_put_domains_work(power_domains,
power_domains    2065 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    2067 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    2089 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    2092 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    2094 drivers/gpu/drm/i915/display/intel_display_power.c 	work_wakeref = fetch_and_zero(&power_domains->async_put_wakeref);
power_domains    2098 drivers/gpu/drm/i915/display/intel_display_power.c 	release_async_put_domains(power_domains,
power_domains    2099 drivers/gpu/drm/i915/display/intel_display_power.c 				  async_put_domains_mask(power_domains));
power_domains    2100 drivers/gpu/drm/i915/display/intel_display_power.c 	cancel_delayed_work(&power_domains->async_put_work);
power_domains    2103 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    2105 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    2121 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    2124 drivers/gpu/drm/i915/display/intel_display_power.c 	cancel_delayed_work_sync(&power_domains->async_put_work);
power_domains    2126 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    2128 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN_ON(power_domains->async_put_wakeref);
power_domains    3980 drivers/gpu/drm/i915/display/intel_display_power.c __set_power_wells(struct i915_power_domains *power_domains,
power_domains    3987 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->power_well_count = power_well_count;
power_domains    3988 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->power_wells =
power_domains    3990 drivers/gpu/drm/i915/display/intel_display_power.c 					sizeof(*power_domains->power_wells),
power_domains    3992 drivers/gpu/drm/i915/display/intel_display_power.c 	if (!power_domains->power_wells)
power_domains    3998 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->power_wells[i].desc = &power_well_descs[i];
power_domains    4011 drivers/gpu/drm/i915/display/intel_display_power.c #define set_power_wells(power_domains, __power_well_descs) \
power_domains    4012 drivers/gpu/drm/i915/display/intel_display_power.c 	__set_power_wells(power_domains, __power_well_descs, \
power_domains    4024 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4035 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_init(&power_domains->lock);
power_domains    4037 drivers/gpu/drm/i915/display/intel_display_power.c 	INIT_DELAYED_WORK(&power_domains->async_put_work,
power_domains    4045 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, tgl_power_wells);
power_domains    4047 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, icl_power_wells);
power_domains    4049 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, cnl_power_wells);
power_domains    4058 drivers/gpu/drm/i915/display/intel_display_power.c 			power_domains->power_well_count -= 2;
power_domains    4060 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, glk_power_wells);
power_domains    4062 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, bxt_power_wells);
power_domains    4064 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, skl_power_wells);
power_domains    4066 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, chv_power_wells);
power_domains    4068 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, bdw_power_wells);
power_domains    4070 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, hsw_power_wells);
power_domains    4072 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, vlv_power_wells);
power_domains    4074 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, i830_power_wells);
power_domains    4076 drivers/gpu/drm/i915/display/intel_display_power.c 		err = set_power_wells(power_domains, i9xx_always_on_power_well);
power_domains    4090 drivers/gpu/drm/i915/display/intel_display_power.c 	kfree(dev_priv->power_domains.power_wells);
power_domains    4095 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4098 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4104 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4492 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4501 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4509 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4521 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4533 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4544 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4551 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4565 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4570 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4582 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4598 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4603 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4610 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4625 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4628 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4642 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4660 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4663 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4674 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4689 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4692 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4709 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    4727 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    4730 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains    4901 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    4903 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->initializing = true;
power_domains    4917 drivers/gpu/drm/i915/display/intel_display_power.c 		mutex_lock(&power_domains->lock);
power_domains    4919 drivers/gpu/drm/i915/display/intel_display_power.c 		mutex_unlock(&power_domains->lock);
power_domains    4922 drivers/gpu/drm/i915/display/intel_display_power.c 		mutex_lock(&power_domains->lock);
power_domains    4924 drivers/gpu/drm/i915/display/intel_display_power.c 		mutex_unlock(&power_domains->lock);
power_domains    4940 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->wakeref =
power_domains    4948 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->initializing = false;
power_domains    4965 drivers/gpu/drm/i915/display/intel_display_power.c 		fetch_and_zero(&i915->power_domains.wakeref);
power_domains    4994 drivers/gpu/drm/i915/display/intel_display_power.c 		fetch_and_zero(&i915->power_domains.wakeref);
power_domains    5009 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    5011 drivers/gpu/drm/i915/display/intel_display_power.c 	WARN_ON(power_domains->wakeref);
power_domains    5012 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->wakeref =
power_domains    5032 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    5034 drivers/gpu/drm/i915/display/intel_display_power.c 		fetch_and_zero(&power_domains->wakeref);
power_domains    5072 drivers/gpu/drm/i915/display/intel_display_power.c 	power_domains->display_core_suspended = true;
power_domains    5087 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    5089 drivers/gpu/drm/i915/display/intel_display_power.c 	if (power_domains->display_core_suspended) {
power_domains    5091 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->display_core_suspended = false;
power_domains    5093 drivers/gpu/drm/i915/display/intel_display_power.c 		WARN_ON(power_domains->wakeref);
power_domains    5094 drivers/gpu/drm/i915/display/intel_display_power.c 		power_domains->wakeref =
power_domains    5105 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    5118 drivers/gpu/drm/i915/display/intel_display_power.c 					 power_domains->domain_use_count[domain]);
power_domains    5134 drivers/gpu/drm/i915/display/intel_display_power.c 	struct i915_power_domains *power_domains = &i915->power_domains;
power_domains    5138 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_lock(&power_domains->lock);
power_domains    5140 drivers/gpu/drm/i915/display/intel_display_power.c 	verify_async_put_domains_state(power_domains);
power_domains    5157 drivers/gpu/drm/i915/display/intel_display_power.c 			domains_count += power_domains->domain_use_count[domain];
power_domains    5177 drivers/gpu/drm/i915/display/intel_display_power.c 	mutex_unlock(&power_domains->lock);
power_domains     237 drivers/gpu/drm/i915/display/intel_display_power.h 	for ((__power_well) = (__dev_priv)->power_domains.power_wells;	\
power_domains     238 drivers/gpu/drm/i915/display/intel_display_power.h 	     (__power_well) - (__dev_priv)->power_domains.power_wells <	\
power_domains     239 drivers/gpu/drm/i915/display/intel_display_power.h 		(__dev_priv)->power_domains.power_well_count;		\
power_domains     243 drivers/gpu/drm/i915/display/intel_display_power.h 	for ((__power_well) = (__dev_priv)->power_domains.power_wells +		\
power_domains     244 drivers/gpu/drm/i915/display/intel_display_power.h 			      (__dev_priv)->power_domains.power_well_count - 1;	\
power_domains     245 drivers/gpu/drm/i915/display/intel_display_power.h 	     (__power_well) - (__dev_priv)->power_domains.power_wells >= 0;	\
power_domains     471 drivers/gpu/drm/i915/display/intel_dpio_phy.c 	lockdep_assert_held(&dev_priv->power_domains.lock);
power_domains     151 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains     165 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&power_domains->lock);
power_domains     175 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&power_domains->lock);
power_domains    2320 drivers/gpu/drm/i915/i915_debugfs.c 		   enableddisabled(!dev_priv->power_domains.wakeref));
power_domains    2347 drivers/gpu/drm/i915/i915_debugfs.c 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
power_domains    2350 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_lock(&power_domains->lock);
power_domains    2353 drivers/gpu/drm/i915/i915_debugfs.c 	for (i = 0; i < power_domains->power_well_count; i++) {
power_domains    2357 drivers/gpu/drm/i915/i915_debugfs.c 		power_well = &power_domains->power_wells[i];
power_domains    2365 drivers/gpu/drm/i915/i915_debugfs.c 				 power_domains->domain_use_count[power_domain]);
power_domains    2368 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_unlock(&power_domains->lock);
power_domains    1509 drivers/gpu/drm/i915/i915_drv.h 	struct i915_power_domains power_domains;
power_domains     317 drivers/pci/hotplug/rpaphp_core.c 		     const __be32 **power_domains)
power_domains     322 drivers/pci/hotplug/rpaphp_core.c 	rc = get_children_props(dn, indexes, names, &drc_types, power_domains);
power_domains     354 drivers/pci/hotplug/rpaphp_core.c 	const __be32 *indexes, *names, *types, *power_domains;
power_domains     361 drivers/pci/hotplug/rpaphp_core.c 	if (!is_php_dn(dn, &indexes, &names, &types, &power_domains))
power_domains     374 drivers/pci/hotplug/rpaphp_core.c 					 be32_to_cpu(power_domains[i + 1]));
power_domains    1452 scripts/dtc/checks.c WARNING_PROPERTY_PHANDLE_CELLS(power_domains, "power-domains", "#power-domain-cells");