post_fix 86 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h #define ABM_SF(reg_name, field_name, post_fix)\ post_fix 87 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 44 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h #define SF(reg_name, field_name, post_fix)\ post_fix 45 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 45 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h #define CS_SF(reg_name, field_name, post_fix)\ post_fix 46 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 74 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h #define DMCU_SF(reg_name, field_name, post_fix)\ post_fix 75 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 442 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h #define HWS_SF(blk_name, reg_name, field_name, post_fix)\ post_fix 443 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix post_fix 445 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h #define HWS_SF1(blk_name, reg_name, field_name, post_fix)\ post_fix 446 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h .field_name = blk_name ## reg_name ## __ ## blk_name ## field_name ## post_fix post_fix 98 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h #define I2C_SF(reg_name, field_name, post_fix)\ post_fix 99 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 64 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h #define IPP_SF(reg_name, field_name, post_fix)\ post_fix 65 drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 126 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h #define SFB(blk_name, reg_name, field_name, post_fix)\ post_fix 127 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix post_fix 84 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h #define OPP_SF(reg_name, field_name, post_fix)\ post_fix 85 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 115 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h #define SE_SF(reg_name, field_name, post_fix)\ post_fix 116 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 111 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h #define XFM_SF(reg_name, field_name, post_fix)\ post_fix 112 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 37 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h #define TF_SF(reg_name, field_name, post_fix)\ post_fix 38 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 41 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h #define TF2_SF(reg_name, field_name, post_fix)\ post_fix 42 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h .field_name = reg_name ## _ ## field_name ## post_fix post_fix 49 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h #define SF(reg_name, field_name, post_fix)\ post_fix 50 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 147 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h #define HUBBUB_SF(reg_name, field_name, post_fix)\ post_fix 148 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 238 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h #define HUBP_SF(reg_name, field_name, post_fix)\ post_fix 239 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 74 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h #define IPP_SF(reg_name, field_name, post_fix)\ post_fix 75 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 128 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h #define LE_SF(reg_name, field_name, post_fix)\ post_fix 129 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 33 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h #define OPP_SF(reg_name, field_name, post_fix)\ post_fix 34 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 178 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h #define SE_SF(reg_name, field_name, post_fix)\ post_fix 179 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 44 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h #define DCCG_SF(reg_name, field_name, post_fix)\ post_fix 45 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 47 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\ post_fix 48 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h .field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix post_fix 88 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h #define DSC_SF(reg_name, field_name, post_fix)\ post_fix 89 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 92 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h #define DSC2_SF(reg_name, field_name, post_fix)\ post_fix 93 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h .field_name = reg_name ## _ ## field_name ## post_fix post_fix 53 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h #define SF(reg_name, field_name, post_fix)\ post_fix 54 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 55 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h #define SF(reg_name, field_name, post_fix)\ post_fix 56 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 33 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h #define OPP_SF(reg_name, field_name, post_fix)\ post_fix 34 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 41 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h #define SF(reg_name, field_name, post_fix)\ post_fix 42 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h .field_name = reg_name ## __ ## field_name ## post_fix post_fix 42 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 43 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 83 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 84 drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 46 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 47 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix post_fix 50 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 51 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix post_fix 96 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 97 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 83 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 84 drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 47 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 48 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix post_fix 92 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 93 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 128 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c #define SF_GENERIC(reg_name, field_name, post_fix)\ post_fix 129 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 63 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 64 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix post_fix 70 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #define SF(reg_name, field_name, post_fix)\ post_fix 71 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 103 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 104 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 145 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #define SF_GENERIC(reg_name, field_name, post_fix)\ post_fix 146 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 58 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 59 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 61 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 62 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix post_fix 68 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #define SF(reg_name, field_name, post_fix)\ post_fix 69 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 100 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #define SF_DDC(reg_name, field_name, post_fix)\ post_fix 101 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 140 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #define SF_GENERIC(reg_name, field_name, post_fix)\ post_fix 141 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 58 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c #define SF_HPD(reg_name, field_name, post_fix)\ post_fix 59 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c .field_name = reg_name ## __ ## field_name ## post_fix post_fix 106 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h #define CLK_SF(reg_name, field_name, post_fix)\ post_fix 107 drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h .field_name = reg_name ## __ ## field_name ## post_fix