post_div_max      126 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 	unsigned post_div_min, post_div_max, post_div;
post_div_max      155 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		post_div_max = pll->post_div;
post_div_max      178 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		post_div_max = vco_max / target_clock;
post_div_max      179 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		if ((target_clock * post_div_max) > vco_max)
post_div_max      180 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 			--post_div_max;
post_div_max      181 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		if (post_div_max > pll->max_post_div)
post_div_max      182 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 			post_div_max = pll->max_post_div;
post_div_max      196 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		post_div_best = post_div_max;
post_div_max      199 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 	for (post_div = post_div_min; post_div <= post_div_max; ++post_div) {
post_div_max      967 drivers/gpu/drm/radeon/radeon_display.c 	unsigned post_div_min, post_div_max, post_div;
post_div_max      999 drivers/gpu/drm/radeon/radeon_display.c 		post_div_max = pll->post_div;
post_div_max     1022 drivers/gpu/drm/radeon/radeon_display.c 		post_div_max = vco_max / target_clock;
post_div_max     1023 drivers/gpu/drm/radeon/radeon_display.c 		if ((target_clock * post_div_max) > vco_max)
post_div_max     1024 drivers/gpu/drm/radeon/radeon_display.c 			--post_div_max;
post_div_max     1025 drivers/gpu/drm/radeon/radeon_display.c 		if (post_div_max > pll->max_post_div)
post_div_max     1026 drivers/gpu/drm/radeon/radeon_display.c 			post_div_max = pll->max_post_div;
post_div_max     1040 drivers/gpu/drm/radeon/radeon_display.c 		post_div_best = post_div_max;
post_div_max     1043 drivers/gpu/drm/radeon/radeon_display.c 	for (post_div = post_div_min; post_div <= post_div_max; ++post_div) {