post_clamp        181 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 	for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
post_clamp        186 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c 				csc->post_clamp[i]);
post_clamp        602 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 		uint32_t *post_clamp = csc->post_clamp;
post_clamp        609 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 			MDP5_PIPE_CSC_1_POST_CLAMP_REG_HIGH(post_clamp[2*i+1]) |
post_clamp        610 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 			MDP5_PIPE_CSC_1_POST_CLAMP_REG_LOW(post_clamp[2*i]));
post_clamp         23 drivers/gpu/drm/msm/disp/mdp_format.c 		.post_clamp =	{ 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
post_clamp         35 drivers/gpu/drm/msm/disp/mdp_format.c 		.post_clamp =	{ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
post_clamp         47 drivers/gpu/drm/msm/disp/mdp_format.c 		.post_clamp =	{ 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0 },
post_clamp         59 drivers/gpu/drm/msm/disp/mdp_format.c 		.post_clamp =	{ 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
post_clamp        132 drivers/gpu/drm/msm/disp/mdp_kms.h 	uint32_t post_clamp[6];