possible_crtcs 3487 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c encoder->possible_crtcs = 0x1; possible_crtcs 3491 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c encoder->possible_crtcs = 0x3; possible_crtcs 3494 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c encoder->possible_crtcs = 0xf; possible_crtcs 3497 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c encoder->possible_crtcs = 0x3f; possible_crtcs 3613 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0x1; possible_crtcs 3617 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0x3; possible_crtcs 3620 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0x7; possible_crtcs 3623 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0xf; possible_crtcs 3626 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0x1f; possible_crtcs 3629 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c encoder->possible_crtcs = 0x3f; possible_crtcs 3297 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c encoder->possible_crtcs = 0x1; possible_crtcs 3301 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c encoder->possible_crtcs = 0x3; possible_crtcs 3304 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c encoder->possible_crtcs = 0xf; possible_crtcs 3307 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c encoder->possible_crtcs = 0x3f; possible_crtcs 3375 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c encoder->possible_crtcs = 0x1; possible_crtcs 3379 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c encoder->possible_crtcs = 0x3; possible_crtcs 3382 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c encoder->possible_crtcs = 0xf; possible_crtcs 3385 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c encoder->possible_crtcs = 0x3f; possible_crtcs 595 drivers/gpu/drm/amd/amdgpu/dce_virtual.c encoder->possible_crtcs = 1 << index; possible_crtcs 119 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c unsigned long possible_crtcs, possible_crtcs 2166 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c unsigned long possible_crtcs; possible_crtcs 2182 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c possible_crtcs = 1 << plane_id; possible_crtcs 2184 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c possible_crtcs = 0xff; possible_crtcs 2186 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ret = amdgpu_dm_plane_init(dm, plane, possible_crtcs, plane_cap); possible_crtcs 4735 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c unsigned long possible_crtcs, possible_crtcs 4745 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c res = drm_universal_plane_init(dm->adev->ddev, plane, possible_crtcs, possible_crtcs 5293 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c aencoder->base.possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); possible_crtcs 284 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); possible_crtcs 34 drivers/gpu/drm/arc/arcpgu_hdmi.c encoder->possible_crtcs = 1; possible_crtcs 68 drivers/gpu/drm/arc/arcpgu_sim.c encoder->possible_crtcs = 1; possible_crtcs 210 drivers/gpu/drm/arm/display/komeda/komeda_plane.c u32 possible_crtcs = 0; possible_crtcs 217 drivers/gpu/drm/arm/display/komeda/komeda_plane.c possible_crtcs |= BIT(i); possible_crtcs 220 drivers/gpu/drm/arm/display/komeda/komeda_plane.c return possible_crtcs; possible_crtcs 157 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c wb_conn->encoder.possible_crtcs = BIT(drm_crtc_index(&kcrtc->base)); possible_crtcs 218 drivers/gpu/drm/arm/malidp_mw.c malidp->mw_connector.encoder.possible_crtcs = 1 << drm_crtc_index(&malidp->crtc); possible_crtcs 746 drivers/gpu/drm/ast/ast_mode.c ast_encoder->base.possible_crtcs = 1; possible_crtcs 526 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c overlay->base.possible_crtcs = 1 << crtc->id; possible_crtcs 107 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c output->encoder.possible_crtcs = 0x1; possible_crtcs 565 drivers/gpu/drm/drm_atomic.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { possible_crtcs 421 drivers/gpu/drm/drm_client_modeset.c if (encoder->possible_crtcs & drm_crtc_mask(crtc)) possible_crtcs 284 drivers/gpu/drm/drm_crtc.c if (primary && !primary->possible_crtcs) possible_crtcs 285 drivers/gpu/drm/drm_crtc.c primary->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 286 drivers/gpu/drm/drm_crtc.c if (cursor && !cursor->possible_crtcs) possible_crtcs 287 drivers/gpu/drm/drm_crtc.c cursor->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 243 drivers/gpu/drm/drm_encoder.c enc_resp->possible_crtcs = drm_lease_filter_crtcs(file_priv, possible_crtcs 244 drivers/gpu/drm/drm_encoder.c encoder->possible_crtcs); possible_crtcs 66 drivers/gpu/drm/drm_of.c uint32_t possible_crtcs = 0; possible_crtcs 75 drivers/gpu/drm/drm_of.c possible_crtcs |= drm_of_crtc_port_mask(dev, remote_port); possible_crtcs 80 drivers/gpu/drm/drm_of.c return possible_crtcs; possible_crtcs 174 drivers/gpu/drm/drm_plane.c uint32_t possible_crtcs, possible_crtcs 259 drivers/gpu/drm/drm_plane.c plane->possible_crtcs = possible_crtcs; possible_crtcs 333 drivers/gpu/drm/drm_plane.c uint32_t possible_crtcs, possible_crtcs 341 drivers/gpu/drm/drm_plane.c return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, possible_crtcs 543 drivers/gpu/drm/drm_plane.c plane_resp->possible_crtcs = drm_lease_filter_crtcs(file_priv, possible_crtcs 544 drivers/gpu/drm/drm_plane.c plane->possible_crtcs); possible_crtcs 607 drivers/gpu/drm/drm_plane.c if (!(plane->possible_crtcs & drm_crtc_mask(crtc))) { possible_crtcs 289 drivers/gpu/drm/drm_simple_kms_helper.c encoder->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 228 drivers/gpu/drm/exynos/exynos_drm_crtc.c encoder->possible_crtcs = drm_crtc_mask(&crtc->base); possible_crtcs 34 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c encoder->possible_crtcs = 1; possible_crtcs 617 drivers/gpu/drm/gma500/framebuffer.c encoder->possible_crtcs = crtc_mask; possible_crtcs 1008 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c encoder->possible_crtcs = (1 << 2); possible_crtcs 1011 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c encoder->possible_crtcs = (1 << 0); possible_crtcs 116 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c encoder->possible_crtcs = 0x1; possible_crtcs 714 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c encoder->possible_crtcs = crtc_mask; possible_crtcs 2018 drivers/gpu/drm/i2c/tda998x_drv.c priv->encoder.possible_crtcs = crtcs; possible_crtcs 11138 drivers/gpu/drm/i915/display/intel_display.c if (!(encoder->possible_crtcs & (1 << i))) possible_crtcs 14845 drivers/gpu/drm/i915/display/intel_display.c unsigned int possible_crtcs; possible_crtcs 14904 drivers/gpu/drm/i915/display/intel_display.c possible_crtcs = BIT(pipe); possible_crtcs 14908 drivers/gpu/drm/i915/display/intel_display.c possible_crtcs, plane_funcs, possible_crtcs 14914 drivers/gpu/drm/i915/display/intel_display.c possible_crtcs, plane_funcs, possible_crtcs 14952 drivers/gpu/drm/i915/display/intel_display.c unsigned int possible_crtcs; possible_crtcs 14985 drivers/gpu/drm/i915/display/intel_display.c possible_crtcs = BIT(pipe); possible_crtcs 14988 drivers/gpu/drm/i915/display/intel_display.c possible_crtcs, &intel_cursor_plane_funcs, possible_crtcs 15538 drivers/gpu/drm/i915/display/intel_display.c encoder->base.possible_crtcs = encoder->crtc_mask; possible_crtcs 2436 drivers/gpu/drm/i915/display/intel_sprite.c unsigned int possible_crtcs; possible_crtcs 2486 drivers/gpu/drm/i915/display/intel_sprite.c possible_crtcs = BIT(pipe); possible_crtcs 2489 drivers/gpu/drm/i915/display/intel_sprite.c possible_crtcs, &skl_plane_funcs, possible_crtcs 2538 drivers/gpu/drm/i915/display/intel_sprite.c unsigned long possible_crtcs; possible_crtcs 2611 drivers/gpu/drm/i915/display/intel_sprite.c possible_crtcs = BIT(pipe); possible_crtcs 2614 drivers/gpu/drm/i915/display/intel_sprite.c possible_crtcs, plane_funcs, possible_crtcs 1953 drivers/gpu/drm/i915/display/intel_tv.c intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1)); possible_crtcs 224 drivers/gpu/drm/imx/dw_hdmi-imx.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); possible_crtcs 231 drivers/gpu/drm/imx/dw_hdmi-imx.c if (encoder->possible_crtcs == 0) possible_crtcs 140 drivers/gpu/drm/imx/imx-drm-core.c encoder->possible_crtcs = crtc_mask; possible_crtcs 826 drivers/gpu/drm/imx/ipuv3-plane.c int dma, int dp, unsigned int possible_crtcs, possible_crtcs 835 drivers/gpu/drm/imx/ipuv3-plane.c dma, dp, possible_crtcs); possible_crtcs 850 drivers/gpu/drm/imx/ipuv3-plane.c ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs, possible_crtcs 33 drivers/gpu/drm/imx/ipuv3-plane.h int dma, int dp, unsigned int possible_crtcs, possible_crtcs 720 drivers/gpu/drm/ingenic/ingenic-drm.c priv->encoder.possible_crtcs = 1; possible_crtcs 607 drivers/gpu/drm/mediatek/mtk_dpi.c dpi->encoder.possible_crtcs = BIT(1); possible_crtcs 157 drivers/gpu/drm/mediatek/mtk_drm_plane.c unsigned long possible_crtcs, enum drm_plane_type type) possible_crtcs 161 drivers/gpu/drm/mediatek/mtk_drm_plane.c err = drm_universal_plane_init(dev, plane, possible_crtcs, possible_crtcs 38 drivers/gpu/drm/mediatek/mtk_drm_plane.h unsigned long possible_crtcs, enum drm_plane_type type); possible_crtcs 820 drivers/gpu/drm/mediatek/mtk_dsi.c dsi->encoder.possible_crtcs = 1; possible_crtcs 924 drivers/gpu/drm/meson/meson_dw_hdmi.c encoder->possible_crtcs = BIT(0); possible_crtcs 288 drivers/gpu/drm/meson/meson_venc_cvbs.c encoder->possible_crtcs = BIT(0); possible_crtcs 1512 drivers/gpu/drm/mgag200/mgag200_mode.c encoder->possible_crtcs = 0x1; possible_crtcs 568 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c priv->encoders[i]->possible_crtcs = (1 << priv->num_crtcs) - 1; possible_crtcs 1456 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c unsigned long possible_crtcs, u32 master_plane_id) possible_crtcs 112 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h unsigned long possible_crtcs, u32 master_plane_id); possible_crtcs 267 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c encoder->possible_crtcs = 1 << DMA_P; possible_crtcs 287 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c encoder->possible_crtcs = 1 << 1; possible_crtcs 317 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c encoder->possible_crtcs = 1 << DMA_P; possible_crtcs 544 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c encoder->possible_crtcs = (1 << priv->num_crtcs) - 1; possible_crtcs 555 drivers/gpu/drm/nouveau/dispnv04/dac.c encoder->possible_crtcs = entry->heads; possible_crtcs 712 drivers/gpu/drm/nouveau/dispnv04/dfp.c encoder->possible_crtcs = entry->heads; possible_crtcs 232 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c encoder->possible_crtcs = entry->heads; possible_crtcs 822 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c encoder->possible_crtcs = entry->heads; possible_crtcs 469 drivers/gpu/drm/nouveau/dispnv50/disp.c encoder->possible_crtcs = dcbe->heads; possible_crtcs 935 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->encoder.possible_crtcs = heads; possible_crtcs 1601 drivers/gpu/drm/nouveau/dispnv50/disp.c encoder->possible_crtcs = dcbe->heads; possible_crtcs 1760 drivers/gpu/drm/nouveau/dispnv50/disp.c encoder->possible_crtcs = dcbe->heads; possible_crtcs 352 drivers/gpu/drm/omapdrm/omap_drv.c encoder->possible_crtcs = 1 << i; possible_crtcs 252 drivers/gpu/drm/omapdrm/omap_plane.c u32 possible_crtcs) possible_crtcs 282 drivers/gpu/drm/omapdrm/omap_plane.c ret = drm_universal_plane_init(dev, plane, possible_crtcs, possible_crtcs 22 drivers/gpu/drm/omapdrm/omap_plane.h u32 possible_crtcs); possible_crtcs 892 drivers/gpu/drm/qxl/qxl_display.c unsigned int possible_crtcs, possible_crtcs 920 drivers/gpu/drm/qxl/qxl_display.c err = drm_universal_plane_init(&qdev->ddev, plane, possible_crtcs, possible_crtcs 1120 drivers/gpu/drm/qxl/qxl_display.c encoder->possible_crtcs = 1 << num_output; possible_crtcs 2752 drivers/gpu/drm/radeon/atombios_encoders.c encoder->possible_crtcs = 0x1; possible_crtcs 2756 drivers/gpu/drm/radeon/atombios_encoders.c encoder->possible_crtcs = 0x3; possible_crtcs 2759 drivers/gpu/drm/radeon/atombios_encoders.c encoder->possible_crtcs = 0xf; possible_crtcs 2762 drivers/gpu/drm/radeon/atombios_encoders.c encoder->possible_crtcs = 0x3f; possible_crtcs 624 drivers/gpu/drm/radeon/radeon_dp_mst.c encoder->possible_crtcs = 0x1; possible_crtcs 628 drivers/gpu/drm/radeon/radeon_dp_mst.c encoder->possible_crtcs = 0x3; possible_crtcs 631 drivers/gpu/drm/radeon/radeon_dp_mst.c encoder->possible_crtcs = 0xf; possible_crtcs 634 drivers/gpu/drm/radeon/radeon_dp_mst.c encoder->possible_crtcs = 0x3f; possible_crtcs 1768 drivers/gpu/drm/radeon/radeon_legacy_encoders.c encoder->possible_crtcs = 0x1; possible_crtcs 1770 drivers/gpu/drm/radeon/radeon_legacy_encoders.c encoder->possible_crtcs = 0x3; possible_crtcs 1781 drivers/gpu/drm/radeon/radeon_legacy_encoders.c encoder->possible_crtcs = 0x1; possible_crtcs 47 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1) | BIT(0), possible_crtcs 51 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 69 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 73 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 91 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 95 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 99 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0) | BIT(1), possible_crtcs 118 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2), possible_crtcs 122 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 126 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 144 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0) | BIT(1), possible_crtcs 148 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 152 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 171 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 175 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1) | BIT(0), possible_crtcs 194 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2) | BIT(1) | BIT(0), possible_crtcs 198 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 202 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2) | BIT(1), possible_crtcs 222 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1) | BIT(0), possible_crtcs 226 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 242 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 246 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 264 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 268 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 287 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(3), possible_crtcs 291 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 295 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2), possible_crtcs 299 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 320 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2), possible_crtcs 324 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 328 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 349 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(2), possible_crtcs 353 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 357 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 375 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 379 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 397 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0) | BIT(1), possible_crtcs 401 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(0), possible_crtcs 405 drivers/gpu/drm/rcar-du/rcar_du_drv.c .possible_crtcs = BIT(1), possible_crtcs 44 drivers/gpu/drm/rcar-du/rcar_du_drv.h unsigned int possible_crtcs; possible_crtcs 495 drivers/gpu/drm/rcar-du/rcar_du_kms.c if (rcdu->info->routes[i].possible_crtcs && possible_crtcs 744 drivers/gpu/drm/rcar-du/rcar_du_kms.c encoder->possible_crtcs = route->possible_crtcs; possible_crtcs 767 drivers/gpu/drm/rcar-du/rcar_du_kms.c dpad0_sources = rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs; possible_crtcs 203 drivers/gpu/drm/rcar-du/rcar_du_writeback.c wb_conn->encoder.possible_crtcs = 1 << drm_crtc_index(&rcrtc->crtc); possible_crtcs 308 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, possible_crtcs 310 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); possible_crtcs 1029 drivers/gpu/drm/rockchip/cdn-dp-core.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, possible_crtcs 1031 drivers/gpu/drm/rockchip/cdn-dp-core.c DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); possible_crtcs 675 drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, possible_crtcs 515 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); possible_crtcs 522 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c if (encoder->possible_crtcs == 0) possible_crtcs 608 drivers/gpu/drm/rockchip/inno_hdmi.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); possible_crtcs 616 drivers/gpu/drm/rockchip/inno_hdmi.c if (encoder->possible_crtcs == 0) possible_crtcs 547 drivers/gpu/drm/rockchip/rk3066_hdmi.c encoder->possible_crtcs = possible_crtcs 556 drivers/gpu/drm/rockchip/rk3066_hdmi.c if (encoder->possible_crtcs == 0) possible_crtcs 1560 drivers/gpu/drm/rockchip/rockchip_drm_vop.c unsigned long possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 1566 drivers/gpu/drm/rockchip/rockchip_drm_vop.c possible_crtcs, possible_crtcs 401 drivers/gpu/drm/rockchip/rockchip_lvds.c encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, possible_crtcs 125 drivers/gpu/drm/rockchip/rockchip_rgb.c encoder->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 577 drivers/gpu/drm/shmobile/shmob_drm_crtc.c encoder->possible_crtcs = 1; possible_crtcs 361 drivers/gpu/drm/sti/sti_cursor.c unsigned int possible_crtcs) possible_crtcs 391 drivers/gpu/drm/sti/sti_cursor.c possible_crtcs, possible_crtcs 16 drivers/gpu/drm/sti/sti_cursor.h unsigned int possible_crtcs); possible_crtcs 914 drivers/gpu/drm/sti/sti_gdp.c unsigned int possible_crtcs, possible_crtcs 936 drivers/gpu/drm/sti/sti_gdp.c possible_crtcs, possible_crtcs 22 drivers/gpu/drm/sti/sti_gdp.h unsigned int possible_crtcs, possible_crtcs 674 drivers/gpu/drm/sti/sti_tvout.c drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; possible_crtcs 726 drivers/gpu/drm/sti/sti_tvout.c drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; possible_crtcs 774 drivers/gpu/drm/sti/sti_tvout.c drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; possible_crtcs 935 drivers/gpu/drm/stm/ltdc.c unsigned long possible_crtcs = CRTC_MASK; possible_crtcs 969 drivers/gpu/drm/stm/ltdc.c ret = drm_universal_plane_init(ddev, plane, possible_crtcs, possible_crtcs 1052 drivers/gpu/drm/stm/ltdc.c encoder->possible_crtcs = CRTC_MASK; possible_crtcs 242 drivers/gpu/drm/sun4i/sun4i_crtc.c uint32_t possible_crtcs = drm_crtc_mask(&scrtc->crtc); possible_crtcs 246 drivers/gpu/drm/sun4i/sun4i_crtc.c plane->possible_crtcs = possible_crtcs; possible_crtcs 623 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c hdmi->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm, possible_crtcs 625 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c if (!hdmi->encoder.possible_crtcs) { possible_crtcs 134 drivers/gpu/drm/sun4i/sun4i_lvds.c lvds->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc); possible_crtcs 231 drivers/gpu/drm/sun4i/sun4i_rgb.c rgb->encoder.possible_crtcs = drm_crtc_mask(&tcon->crtc->crtc); possible_crtcs 605 drivers/gpu/drm/sun4i/sun4i_tv.c tv->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm, possible_crtcs 607 drivers/gpu/drm/sun4i/sun4i_tv.c if (!tv->encoder.possible_crtcs) { possible_crtcs 1044 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c dsi->encoder.possible_crtcs = BIT(0); possible_crtcs 148 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c encoder->possible_crtcs = possible_crtcs 156 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c if (encoder->possible_crtcs == 0) possible_crtcs 760 drivers/gpu/drm/tegra/dc.c unsigned long possible_crtcs = tegra_plane_get_possible_crtcs(drm); possible_crtcs 781 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, possible_crtcs 925 drivers/gpu/drm/tegra/dc.c unsigned long possible_crtcs = tegra_plane_get_possible_crtcs(drm); possible_crtcs 948 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, possible_crtcs 1043 drivers/gpu/drm/tegra/dc.c unsigned long possible_crtcs = tegra_plane_get_possible_crtcs(drm); possible_crtcs 1066 drivers/gpu/drm/tegra/dc.c err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, possible_crtcs 1063 drivers/gpu/drm/tegra/dsi.c dsi->output.encoder.possible_crtcs = 0x3; possible_crtcs 1455 drivers/gpu/drm/tegra/hdmi.c hdmi->output.encoder.possible_crtcs = 0x3; possible_crtcs 538 drivers/gpu/drm/tegra/hub.c unsigned int possible_crtcs = 0x7; possible_crtcs 562 drivers/gpu/drm/tegra/hub.c err = drm_universal_plane_init(drm, p, possible_crtcs, possible_crtcs 237 drivers/gpu/drm/tegra/output.c output->encoder.possible_crtcs = mask; possible_crtcs 304 drivers/gpu/drm/tegra/rgb.c output->encoder.possible_crtcs = drm_crtc_mask(&dc->base); possible_crtcs 64 drivers/gpu/drm/tilcdc/tilcdc_external.c if (encoder->possible_crtcs & (1 << priv->crtc->index)) possible_crtcs 95 drivers/gpu/drm/tilcdc/tilcdc_external.c priv->external_encoder->possible_crtcs = BIT(0); possible_crtcs 103 drivers/gpu/drm/tilcdc/tilcdc_panel.c encoder->possible_crtcs = 1; possible_crtcs 114 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c encoder->possible_crtcs = 1; possible_crtcs 68 drivers/gpu/drm/udl/udl_encoder.c encoder->possible_crtcs = 1; possible_crtcs 530 drivers/gpu/drm/vboxvideo/vbox_mode.c unsigned int possible_crtcs, possible_crtcs 558 drivers/gpu/drm/vboxvideo/vbox_mode.c err = drm_universal_plane_init(&vbox->ddev, plane, possible_crtcs, possible_crtcs 655 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_encoder->base.possible_crtcs = 1 << i; possible_crtcs 1093 drivers/gpu/drm/vc4/vc4_crtc.c encoder->possible_crtcs |= drm_crtc_mask(crtc); possible_crtcs 1101 drivers/gpu/drm/vc4/vc4_crtc.c encoder->possible_crtcs |= drm_crtc_mask(crtc); possible_crtcs 1194 drivers/gpu/drm/vc4/vc4_crtc.c plane->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 1203 drivers/gpu/drm/vc4/vc4_crtc.c cursor_plane->possible_crtcs = drm_crtc_mask(crtc); possible_crtcs 1234 drivers/gpu/drm/vc4/vc4_crtc.c if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc)) possible_crtcs 285 drivers/gpu/drm/virtio/virtgpu_display.c encoder->possible_crtcs = 1 << index; possible_crtcs 79 drivers/gpu/drm/vkms/vkms_output.c encoder->possible_crtcs = 1; possible_crtcs 437 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c encoder->possible_crtcs = (1 << unit); possible_crtcs 909 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c encoder->possible_crtcs = (1 << unit); possible_crtcs 1804 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c encoder->possible_crtcs = (1 << unit); possible_crtcs 314 drivers/gpu/drm/zte/zx_hdmi.c encoder->possible_crtcs = VOU_CRTC_MASK; possible_crtcs 286 drivers/gpu/drm/zte/zx_tvenc.c encoder->possible_crtcs = BIT(1); possible_crtcs 155 drivers/gpu/drm/zte/zx_vga.c encoder->possible_crtcs = VOU_CRTC_MASK; possible_crtcs 150 include/drm/drm_encoder.h uint32_t possible_crtcs; possible_crtcs 222 include/drm/drm_encoder.h return !!(encoder->possible_crtcs & drm_crtc_mask(crtc)); possible_crtcs 590 include/drm/drm_plane.h uint32_t possible_crtcs; possible_crtcs 715 include/drm/drm_plane.h uint32_t possible_crtcs, possible_crtcs 724 include/drm/drm_plane.h uint32_t possible_crtcs, possible_crtcs 300 include/uapi/drm/drm_mode.h __u32 possible_crtcs; possible_crtcs 328 include/uapi/drm/drm_mode.h __u32 possible_crtcs;