pos2 262 arch/mips/include/asm/octeon/cvmx-pip-defs.h uint64_t pos2:7; pos2 272 arch/mips/include/asm/octeon/cvmx-pip-defs.h uint64_t pos2:7; pos2 170 drivers/acpi/acpica/utprint.c char *pos2; pos2 173 drivers/acpi/acpica/utprint.c pos2 = string; pos2 176 drivers/acpi/acpica/utprint.c *(pos2++) = *(--pos1); pos2 179 drivers/acpi/acpica/utprint.c *pos2 = 0; pos2 1361 drivers/gpu/drm/radeon/evergreen.c u32 pos1, pos2; pos2 1364 drivers/gpu/drm/radeon/evergreen.c pos2 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]); pos2 1366 drivers/gpu/drm/radeon/evergreen.c if (pos1 != pos2) pos2 71 drivers/gpu/drm/radeon/rs600.c u32 pos1, pos2; pos2 74 drivers/gpu/drm/radeon/rs600.c pos2 = RREG32(AVIVO_D1CRTC_STATUS_POSITION + crtc_offsets[crtc]); pos2 76 drivers/gpu/drm/radeon/rs600.c if (pos1 != pos2) pos2 1825 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c u8 *pos2 = tpg->lines[next_pat][p]; pos2 1828 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c for (x = 0; x < w; x++, pos1++, pos2++, dest++) pos2 1829 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c *dest = ((u16)*pos1 + (u16)*pos2) / 2; pos2 105 drivers/pci/vc.c int ctrl_pos, status_pos, id, pos2, evcc, i, ctrl_pos2, status_pos2; pos2 126 drivers/pci/vc.c pos2 = pci_find_ext_capability(dev->bus->self, PCI_EXT_CAP_ID_VC); pos2 127 drivers/pci/vc.c if (!pos2) pos2 130 drivers/pci/vc.c pci_read_config_dword(dev->bus->self, pos2 + PCI_VC_PORT_CAP1, &cap1); pos2 135 drivers/pci/vc.c ctrl_pos2 = pos2 + PCI_VC_RES_CTRL + pos2 137 drivers/pci/vc.c status_pos2 = pos2 + PCI_VC_RES_STATUS + pos2 690 drivers/thermal/thermal_core.c struct thermal_cooling_device *pos2; pos2 701 drivers/thermal/thermal_core.c list_for_each_entry(pos2, &thermal_cdev_list, node) { pos2 702 drivers/thermal/thermal_core.c if (pos2 == cdev) pos2 706 drivers/thermal/thermal_core.c if (tz != pos1 || cdev != pos2) pos2 294 fs/dcookies.c struct list_head * pos2; pos2 300 fs/dcookies.c list_for_each_safe(pos, pos2, list) {