port_mask 85 drivers/ata/ahci_brcm.c u32 port_mask; port_mask 134 drivers/ata/ahci_brcm.c if (priv->port_mask & BIT(i)) port_mask 202 drivers/ata/ahci_brcm.c if (priv->port_mask & BIT(i)) port_mask 211 drivers/ata/ahci_brcm.c if (priv->port_mask & BIT(i)) port_mask 472 drivers/ata/ahci_brcm.c priv->port_mask = brcm_ahci_get_portmask(hpriv, priv); port_mask 473 drivers/ata/ahci_brcm.c if (!priv->port_mask) { port_mask 48 drivers/ata/pata_jmicron.c int port_mask = 1<< (4 * ap->port_no); port_mask 54 drivers/ata/pata_jmicron.c if ((control & port_mask) == 0) port_mask 2902 drivers/ata/sata_mv.c u32 port_mask, ack_irqs; port_mask 2928 drivers/ata/sata_mv.c port_mask = (DONE_IRQ | ERR_IRQ) << (p * 2); port_mask 2929 drivers/ata/sata_mv.c if (hc_cause & port_mask) port_mask 189 drivers/gpio/gpio-104-dio-48e.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 207 drivers/gpio/gpio-104-dio-48e.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 95 drivers/gpio/gpio-104-idi-48.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 113 drivers/gpio/gpio-104-idi-48.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 96 drivers/gpio/gpio-ep93xx.c int port_mask = BIT(offset); port_mask 99 drivers/gpio/gpio-ep93xx.c gpio_int_debounce[port] |= port_mask; port_mask 101 drivers/gpio/gpio-ep93xx.c gpio_int_debounce[port] &= ~port_mask; port_mask 158 drivers/gpio/gpio-ep93xx.c int port_mask = BIT(d->irq & 7); port_mask 161 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] ^= port_mask; /* switch edge direction */ port_mask 165 drivers/gpio/gpio-ep93xx.c writeb(port_mask, epg->base + eoi_register_offset[port]); port_mask 173 drivers/gpio/gpio-ep93xx.c int port_mask = BIT(d->irq & 7); port_mask 176 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] ^= port_mask; /* switch edge direction */ port_mask 178 drivers/gpio/gpio-ep93xx.c gpio_int_unmasked[port] &= ~port_mask; port_mask 181 drivers/gpio/gpio-ep93xx.c writeb(port_mask, epg->base + eoi_register_offset[port]); port_mask 215 drivers/gpio/gpio-ep93xx.c int port_mask = BIT(offset); port_mask 222 drivers/gpio/gpio-ep93xx.c gpio_int_type1[port] |= port_mask; port_mask 223 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] |= port_mask; port_mask 227 drivers/gpio/gpio-ep93xx.c gpio_int_type1[port] |= port_mask; port_mask 228 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] &= ~port_mask; port_mask 232 drivers/gpio/gpio-ep93xx.c gpio_int_type1[port] &= ~port_mask; port_mask 233 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] |= port_mask; port_mask 237 drivers/gpio/gpio-ep93xx.c gpio_int_type1[port] &= ~port_mask; port_mask 238 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] &= ~port_mask; port_mask 242 drivers/gpio/gpio-ep93xx.c gpio_int_type1[port] |= port_mask; port_mask 245 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] &= ~port_mask; /* falling */ port_mask 247 drivers/gpio/gpio-ep93xx.c gpio_int_type2[port] |= port_mask; /* rising */ port_mask 256 drivers/gpio/gpio-ep93xx.c gpio_int_enabled[port] |= port_mask; port_mask 178 drivers/gpio/gpio-gpio-mm.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 196 drivers/gpio/gpio-gpio-mm.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 109 drivers/gpio/gpio-pci-idio-16.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 131 drivers/gpio/gpio-pci-idio-16.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 207 drivers/gpio/gpio-pcie-idio-24.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 231 drivers/gpio/gpio-pcie-idio-24.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 301 drivers/gpio/gpio-pcie-idio-24.c const unsigned long port_mask = GENMASK(gpio_reg_size, 0); port_mask 312 drivers/gpio/gpio-pcie-idio-24.c const unsigned long ttl_mask = (mask[ttl_i] >> word_offset) & port_mask; port_mask 321 drivers/gpio/gpio-pcie-idio-24.c gpio_mask = (*mask >> bits_offset) & port_mask; port_mask 136 drivers/gpio/gpio-ws16c48.c const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); port_mask 154 drivers/gpio/gpio-ws16c48.c word_mask = mask[word_index] & (port_mask << word_offset); port_mask 2017 drivers/gpu/drm/i915/display/intel_ddi.c unsigned int port_mask, ddi_select; port_mask 2026 drivers/gpu/drm/i915/display/intel_ddi.c port_mask = TGL_TRANS_DDI_PORT_MASK; port_mask 2029 drivers/gpu/drm/i915/display/intel_ddi.c port_mask = TRANS_DDI_PORT_MASK; port_mask 2037 drivers/gpu/drm/i915/display/intel_ddi.c if ((tmp & port_mask) != ddi_select) port_mask 2845 drivers/gpu/drm/i915/display/intel_ddi.c u32 port_mask; port_mask 2868 drivers/gpu/drm/i915/display/intel_ddi.c port_mask = BIT(encoder->port); port_mask 2874 drivers/gpu/drm/i915/display/intel_ddi.c port_mask = intel_dsi_encoder_ports(encoder); port_mask 2883 drivers/gpu/drm/i915/display/intel_ddi.c if (WARN_ON(port_mask & BIT(other_encoder->port))) port_mask 2894 drivers/gpu/drm/i915/display/intel_ddi.c for_each_port_masked(port, port_mask) { port_mask 1592 drivers/gpu/drm/i915/display/intel_display.c u32 port_mask; port_mask 1597 drivers/gpu/drm/i915/display/intel_display.c port_mask = DPLL_PORTB_READY_MASK; port_mask 1601 drivers/gpu/drm/i915/display/intel_display.c port_mask = DPLL_PORTC_READY_MASK; port_mask 1606 drivers/gpu/drm/i915/display/intel_display.c port_mask = DPLL_PORTD_READY_MASK; port_mask 1614 drivers/gpu/drm/i915/display/intel_display.c port_mask, expected_mask, 1000)) port_mask 1617 drivers/gpu/drm/i915/display/intel_display.c I915_READ(dpll_reg) & port_mask, expected_mask); port_mask 12205 drivers/gpu/drm/i915/display/intel_display.c unsigned int port_mask; port_mask 12213 drivers/gpu/drm/i915/display/intel_display.c port_mask = 1 << encoder->port; port_mask 12216 drivers/gpu/drm/i915/display/intel_display.c if (used_ports & port_mask) port_mask 12219 drivers/gpu/drm/i915/display/intel_display.c used_ports |= port_mask; port_mask 128 drivers/gpu/drm/i915/gt/intel_engine.h return execlists->port_mask + 1; port_mask 480 drivers/gpu/drm/i915/gt/intel_engine_cs.c execlists->port_mask = 1; port_mask 226 drivers/gpu/drm/i915/gt/intel_engine_types.h unsigned int port_mask; port_mask 1042 drivers/gpu/drm/i915/gt/intel_lrc.c struct i915_request ** const last_port = port + execlists->port_mask; port_mask 541 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c struct i915_request ** const last_port = first + execlists->port_mask; port_mask 2990 drivers/infiniband/hw/hfi1/mad.c u64 port_mask; port_mask 3023 drivers/infiniband/hw/hfi1/mad.c port_mask = be64_to_cpu(req->port_select_mask[3]); port_mask 3024 drivers/infiniband/hw/hfi1/mad.c port_num = find_first_bit((unsigned long *)&port_mask, port_mask 3025 drivers/infiniband/hw/hfi1/mad.c sizeof(port_mask) * 8); port_mask 3212 drivers/infiniband/hw/hfi1/mad.c u64 port_mask, tmp; port_mask 3238 drivers/infiniband/hw/hfi1/mad.c port_mask = be64_to_cpu(req->port_select_mask[3]); port_mask 3239 drivers/infiniband/hw/hfi1/mad.c port_num = find_first_bit((unsigned long *)&port_mask, port_mask 3240 drivers/infiniband/hw/hfi1/mad.c sizeof(port_mask) * 8); port_mask 3379 drivers/infiniband/hw/hfi1/mad.c u64 port_mask; port_mask 3410 drivers/infiniband/hw/hfi1/mad.c port_mask = be64_to_cpu(req->port_select_mask[3]); port_mask 3411 drivers/infiniband/hw/hfi1/mad.c port_num = find_first_bit((unsigned long *)&port_mask, port_mask 3412 drivers/infiniband/hw/hfi1/mad.c sizeof(port_mask) * 8); port_mask 3629 drivers/infiniband/hw/hfi1/mad.c u64 port_mask; port_mask 3652 drivers/infiniband/hw/hfi1/mad.c port_mask = be64_to_cpu(req->port_select_mask[3]); port_mask 3653 drivers/infiniband/hw/hfi1/mad.c port_num = find_first_bit((unsigned long *)&port_mask, port_mask 3654 drivers/infiniband/hw/hfi1/mad.c sizeof(port_mask) * 8); port_mask 653 drivers/infiniband/hw/mlx4/main.c return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? port_mask 142 drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c u16 port_mask; port_mask 169 drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c port_mask = info->vesw.def_port_mask; port_mask 171 drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c if (port_mask & 1) port_mask 173 drivers/infiniband/ulp/opa_vnic/opa_vnic_netdev.c port_mask >>= 1; port_mask 20 drivers/media/pci/solo6x10/solo6x10-gpio.c unsigned int port_mask, unsigned int mode) port_mask 29 drivers/media/pci/solo6x10/solo6x10-gpio.c if (!((1 << port) & port_mask)) port_mask 42 drivers/media/pci/solo6x10/solo6x10-gpio.c if (!((1UL << (port + 16)) & port_mask)) port_mask 442 drivers/net/dsa/b53/b53_common.c u32 port_mask = 0; port_mask 449 drivers/net/dsa/b53/b53_common.c port_mask = dev->enabled_ports; port_mask 452 drivers/net/dsa/b53/b53_common.c port_mask |= JPM_10_100_JUMBO_EN; port_mask 455 drivers/net/dsa/b53/b53_common.c b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask); port_mask 671 drivers/net/dsa/microchip/ksz8795.c data |= (member & dev->port_mask); port_mask 977 drivers/net/dsa/microchip/ksz8795.c member = dev->port_mask; port_mask 1005 drivers/net/dsa/microchip/ksz8795.c p->vid_member = dev->port_mask; port_mask 1018 drivers/net/dsa/microchip/ksz8795.c p->member = dev->port_mask; port_mask 1248 drivers/net/dsa/microchip/ksz8795.c dev->port_mask = BIT(dev->port_cnt) - 1; port_mask 1249 drivers/net/dsa/microchip/ksz8795.c dev->port_mask |= dev->host_mask; port_mask 1271 drivers/net/dsa/microchip/ksz9477.c member = dev->port_mask; port_mask 1304 drivers/net/dsa/microchip/ksz9477.c dev->port_mask |= dev->host_mask; port_mask 1322 drivers/net/dsa/microchip/ksz9477.c p->vid_member = dev->port_mask; port_mask 1338 drivers/net/dsa/microchip/ksz9477.c p->member = dev->port_mask; port_mask 1569 drivers/net/dsa/microchip/ksz9477.c dev->port_mask = (1 << dev->port_cnt) - 1; port_mask 97 drivers/net/dsa/microchip/ksz_common.h u16 port_mask; port_mask 337 drivers/net/dsa/mt7530.c fdb->port_mask = (reg[2] >> PORT_MAP) & PORT_MAP_MASK; port_mask 349 drivers/net/dsa/mt7530.c u8 port_mask, const u8 *mac, port_mask 357 drivers/net/dsa/mt7530.c reg[2] |= (port_mask & PORT_MAP_MASK) << PORT_MAP; port_mask 883 drivers/net/dsa/mt7530.c u8 port_mask = BIT(port); port_mask 886 drivers/net/dsa/mt7530.c mt7530_fdb_write(priv, vid, port_mask, addr, -1, STATIC_ENT); port_mask 899 drivers/net/dsa/mt7530.c u8 port_mask = BIT(port); port_mask 902 drivers/net/dsa/mt7530.c mt7530_fdb_write(priv, vid, port_mask, addr, -1, STATIC_EMP); port_mask 928 drivers/net/dsa/mt7530.c if (_fdb.port_mask & BIT(port)) { port_mask 392 drivers/net/dsa/mt7530.h u8 port_mask; port_mask 146 drivers/net/dsa/mv88e6xxx/global2.c const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; port_mask 147 drivers/net/dsa/mv88e6xxx/global2.c u16 val = (id << 11) | (map & port_mask); port_mask 155 drivers/net/dsa/mv88e6xxx/global2.c const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1; port_mask 160 drivers/net/dsa/mv88e6xxx/global2.c err = mv88e6xxx_g2_trunk_mask_write(chip, i, false, port_mask); port_mask 296 drivers/net/dsa/qca8k.c fdb->port_mask = (reg[1] >> QCA8K_ATU_PORT_S) & QCA8K_ATU_PORT_M; port_mask 307 drivers/net/dsa/qca8k.c qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, port_mask 318 drivers/net/dsa/qca8k.c reg[1] = (port_mask & QCA8K_ATU_PORT_M) << QCA8K_ATU_PORT_S; port_mask 367 drivers/net/dsa/qca8k.c qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); port_mask 376 drivers/net/dsa/qca8k.c qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, port_mask 382 drivers/net/dsa/qca8k.c qca8k_fdb_write(priv, vid, port_mask, mac, aging); port_mask 390 drivers/net/dsa/qca8k.c qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) port_mask 395 drivers/net/dsa/qca8k.c qca8k_fdb_write(priv, vid, port_mask, mac, 0); port_mask 887 drivers/net/dsa/qca8k.c int port_mask = BIT(QCA8K_CPU_PORT); port_mask 900 drivers/net/dsa/qca8k.c port_mask |= BIT(i); port_mask 904 drivers/net/dsa/qca8k.c QCA8K_PORT_LOOKUP_MEMBER, port_mask); port_mask 961 drivers/net/dsa/qca8k.c u16 port_mask, u16 vid) port_mask 967 drivers/net/dsa/qca8k.c return qca8k_fdb_add(priv, addr, port_mask, vid, port_mask 976 drivers/net/dsa/qca8k.c u16 port_mask = BIT(port); port_mask 978 drivers/net/dsa/qca8k.c return qca8k_port_fdb_insert(priv, addr, port_mask, vid); port_mask 986 drivers/net/dsa/qca8k.c u16 port_mask = BIT(port); port_mask 991 drivers/net/dsa/qca8k.c return qca8k_fdb_del(priv, addr, port_mask, vid); port_mask 189 drivers/net/dsa/qca8k.h u8 port_mask; port_mask 2082 drivers/net/ethernet/emulex/benet/be_cmds.h u16 port_mask; port_mask 182 drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h u32 port_mask[DSAF_DEST_PORT_NUM / DSAF_WORD_BIT_CNT]; port_mask 9783 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK; port_mask 9785 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c ixgbe_clear_udp_tunnel_port(adapter, port_mask); port_mask 9793 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK; port_mask 9795 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c ixgbe_clear_udp_tunnel_port(adapter, port_mask); port_mask 9880 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c u32 port_mask; port_mask 9900 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK; port_mask 9912 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK; port_mask 9918 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c ixgbe_clear_udp_tunnel_port(adapter, port_mask); port_mask 568 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c int tid, shift, port_mask; port_mask 573 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c port_mask = 0; port_mask 578 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c port_mask = MVPP2_PRS_PORT_MASK; port_mask 622 drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_tcam_port_map_set(&pe, port_mask); port_mask 2266 drivers/net/ethernet/mellanox/mlx4/fw.c if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { port_mask 2365 drivers/net/ethernet/mellanox/mlx4/fw.c if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) { port_mask 336 drivers/net/ethernet/mellanox/mlx4/main.c dev->caps.port_mask[i] = dev->caps.port_type[i]; port_mask 887 drivers/net/ethernet/mellanox/mlx4/main.c caps->port_mask[i] = caps->port_type[i]; port_mask 3218 drivers/net/ethernet/mellanox/mlx4/resource_tracker.c if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) port_mask 3227 drivers/net/ethernet/mellanox/mlx4/resource_tracker.c if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) port_mask 183 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c u32 port_mask, port_value; port_mask 189 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c port_mask = MLX5_GET(fte_match_param, spec->match_criteria, port_mask 193 drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c return (port_mask & port_value & 0xffff) == MLX5_VPORT_UPLINK; port_mask 106 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1); port_mask 1151 drivers/net/ethernet/mellanox/mlxsw/reg.h MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1); port_mask 1185 drivers/net/ethernet/ti/cpsw.c u32 port_mask = 1 << slave_port | ALE_PORT_HOST; port_mask 1191 drivers/net/ethernet/ti/cpsw.c cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask, port_mask 1192 drivers/net/ethernet/ti/cpsw.c port_mask, port_mask, 0); port_mask 2100 drivers/net/ethernet/ti/cpsw.c u32 port_mask; port_mask 2104 drivers/net/ethernet/ti/cpsw.c port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST; port_mask 2110 drivers/net/ethernet/ti/cpsw.c port_mask = ALE_ALL_PORTS; port_mask 2111 drivers/net/ethernet/ti/cpsw.c mcast_mask = port_mask; port_mask 2119 drivers/net/ethernet/ti/cpsw.c ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, port_mask 108 drivers/net/ethernet/ti/cpsw_ale.c DEFINE_ALE_FIELD1(port_mask, 66) port_mask 243 drivers/net/ethernet/ti/cpsw_ale.c int port_mask) port_mask 249 drivers/net/ethernet/ti/cpsw_ale.c if ((mask & port_mask) == 0) port_mask 251 drivers/net/ethernet/ti/cpsw_ale.c mask &= ~port_mask; port_mask 261 drivers/net/ethernet/ti/cpsw_ale.c int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid) port_mask 288 drivers/net/ethernet/ti/cpsw_ale.c cpsw_ale_flush_mcast(ale, ale_entry, port_mask); port_mask 348 drivers/net/ethernet/ti/cpsw_ale.c int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, port_mask 366 drivers/net/ethernet/ti/cpsw_ale.c port_mask |= mask; port_mask 367 drivers/net/ethernet/ti/cpsw_ale.c cpsw_ale_set_port_mask(ale_entry, port_mask, port_mask 381 drivers/net/ethernet/ti/cpsw_ale.c int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, port_mask 393 drivers/net/ethernet/ti/cpsw_ale.c if (port_mask) port_mask 394 drivers/net/ethernet/ti/cpsw_ale.c cpsw_ale_set_port_mask(ale_entry, port_mask, port_mask 453 drivers/net/ethernet/ti/cpsw_ale.c int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask) port_mask 464 drivers/net/ethernet/ti/cpsw_ale.c if (port_mask) port_mask 465 drivers/net/ethernet/ti/cpsw_ale.c cpsw_ale_set_vlan_member_list(ale_entry, port_mask, port_mask 99 drivers/net/ethernet/ti/cpsw_ale.h int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid); port_mask 104 drivers/net/ethernet/ti/cpsw_ale.h int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, port_mask 106 drivers/net/ethernet/ti/cpsw_ale.h int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, port_mask 2867 drivers/net/usb/hso.c unsigned char port_mask; port_mask 2914 drivers/net/usb/hso.c if (hso_get_mux_ports(interface, &port_mask)) port_mask 2923 drivers/net/usb/hso.c if (port_mask & i) { port_mask 637 drivers/ntb/hw/idt/ntb_hw_idt.c u32 part_mask, port_mask, se_mask; port_mask 644 drivers/ntb/hw/idt/ntb_hw_idt.c port_mask = ~BIT(ndev->port); port_mask 647 drivers/ntb/hw/idt/ntb_hw_idt.c port_mask &= ~BIT(ndev->peers[pidx].port); port_mask 660 drivers/ntb/hw/idt/ntb_hw_idt.c idt_sw_write(ndev, IDT_SW_SELINKUPMSK, port_mask); port_mask 663 drivers/ntb/hw/idt/ntb_hw_idt.c idt_sw_write(ndev, IDT_SW_SELINKDNMSK, port_mask); port_mask 89 drivers/pinctrl/mediatek/mtk-eint.c u32 port = (hwirq >> 5) & eint->hw->port_mask; port_mask 36 drivers/pinctrl/mediatek/mtk-eint.h u8 port_mask; port_mask 524 drivers/pinctrl/mediatek/pinctrl-mt2701.c .port_mask = 0x1f, port_mask 527 drivers/pinctrl/mediatek/pinctrl-mt2701.c .port_mask = 6, port_mask 577 drivers/pinctrl/mediatek/pinctrl-mt2712.c .port_mask = 0xf, port_mask 580 drivers/pinctrl/mediatek/pinctrl-mt2712.c .port_mask = 0xf, port_mask 34 drivers/pinctrl/mediatek/pinctrl-mt6397.c .port_mask = 0x3, port_mask 1060 drivers/pinctrl/mediatek/pinctrl-mt6765.c .port_mask = 7, port_mask 753 drivers/pinctrl/mediatek/pinctrl-mt7622.c .port_mask = 7, port_mask 1368 drivers/pinctrl/mediatek/pinctrl-mt7623.c .port_mask = 6, port_mask 401 drivers/pinctrl/mediatek/pinctrl-mt7629.c .port_mask = 7, port_mask 293 drivers/pinctrl/mediatek/pinctrl-mt8127.c .port_mask = 0xf, port_mask 296 drivers/pinctrl/mediatek/pinctrl-mt8127.c .port_mask = 7, port_mask 306 drivers/pinctrl/mediatek/pinctrl-mt8135.c .port_mask = 0xf, port_mask 309 drivers/pinctrl/mediatek/pinctrl-mt8135.c .port_mask = 7, port_mask 333 drivers/pinctrl/mediatek/pinctrl-mt8173.c .port_mask = 0xf, port_mask 336 drivers/pinctrl/mediatek/pinctrl-mt8173.c .port_mask = 7, port_mask 544 drivers/pinctrl/mediatek/pinctrl-mt8183.c .port_mask = 7, port_mask 325 drivers/pinctrl/mediatek/pinctrl-mt8516.c .port_mask = 0xf, port_mask 328 drivers/pinctrl/mediatek/pinctrl-mt8516.c .port_mask = 7, port_mask 64 drivers/pinctrl/mediatek/pinctrl-mtk-common.c return ((pin >> 4) & pctl->devdata->port_mask) port_mask 185 drivers/pinctrl/mediatek/pinctrl-mtk-common.h u8 port_mask; port_mask 253 drivers/pinctrl/mediatek/pinctrl-mtk-common.h unsigned char port_mask; port_mask 1381 drivers/pinctrl/pinctrl-st.c unsigned long port_in, port_mask, port_comp, active_irqs; port_mask 1392 drivers/pinctrl/pinctrl-st.c port_mask = readl(bank->base + REG_PIO_PMASK); port_mask 1394 drivers/pinctrl/pinctrl-st.c active_irqs = (port_in ^ port_comp) & port_mask; port_mask 2096 drivers/scsi/cxlflash/main.c u64 port_mask; port_mask 2099 drivers/scsi/cxlflash/main.c port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); port_mask 2100 drivers/scsi/cxlflash/main.c if (port_mask != 0ULL) port_mask 2101 drivers/scsi/cxlflash/main.c num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); port_mask 2104 drivers/scsi/cxlflash/main.c __func__, port_mask, num_fc_ports); port_mask 214 drivers/slimbus/stream.c num_ports = hweight32(cfg->port_mask); port_mask 240 drivers/slimbus/stream.c for_each_set_bit(port_id, &cfg->port_mask, SLIM_DEVICE_MAX_PORTS) { port_mask 303 drivers/staging/comedi/drivers/ni_65xx.c unsigned int port_mask, port_rising, port_falling; port_mask 309 drivers/staging/comedi/drivers/ni_65xx.c port_mask = ~0U >> bitshift; port_mask 313 drivers/staging/comedi/drivers/ni_65xx.c port_mask = ~0U << -bitshift; port_mask 317 drivers/staging/comedi/drivers/ni_65xx.c if (port_mask & 0xff) { port_mask 318 drivers/staging/comedi/drivers/ni_65xx.c if (~port_mask & 0xff) { port_mask 322 drivers/staging/comedi/drivers/ni_65xx.c ~port_mask; port_mask 326 drivers/staging/comedi/drivers/ni_65xx.c ~port_mask; port_mask 429 drivers/staging/comedi/drivers/ni_65xx.c unsigned int port_mask, port_data, bits; port_mask 434 drivers/staging/comedi/drivers/ni_65xx.c port_mask = data[0]; port_mask 437 drivers/staging/comedi/drivers/ni_65xx.c port_mask >>= bitshift; port_mask 440 drivers/staging/comedi/drivers/ni_65xx.c port_mask <<= -bitshift; port_mask 443 drivers/staging/comedi/drivers/ni_65xx.c port_mask &= 0xff; port_mask 447 drivers/staging/comedi/drivers/ni_65xx.c if (port_mask) { port_mask 450 drivers/staging/comedi/drivers/ni_65xx.c bits &= ~port_mask; port_mask 451 drivers/staging/comedi/drivers/ni_65xx.c bits |= (port_data & port_mask); port_mask 613 include/linux/mlx4/device.h u32 port_mask[MLX4_MAX_PORTS + 1]; port_mask 1029 include/linux/mlx4/device.h if ((type) == (dev)->caps.port_mask[(port)]) port_mask 1033 include/linux/mlx4/device.h if (((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_IB) || \ port_mask 1034 include/linux/mlx4/device.h ((dev)->caps.port_mask[port] == MLX4_PORT_TYPE_ETH)) port_mask 141 include/linux/slimbus.h unsigned long port_mask; port_mask 43 include/uapi/linux/netfilter/xt_HMARK.h union hmark_ports port_mask; port_mask 66 net/netfilter/xt_HMARK.c hp.b32 = (uports->b32 & info->port_mask.b32) | info->port_set.b32; port_mask 1720 sound/soc/codecs/wcd9335.c cfg->port_mask = 0; port_mask 1726 sound/soc/codecs/wcd9335.c cfg->port_mask |= BIT(ch->port);