port_dpll        2873 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	struct icl_port_dpll *port_dpll =
port_dpll        2876 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	crtc_state->shared_dpll = port_dpll->pll;
port_dpll        2877 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	crtc_state->dpll_hw_state = port_dpll->hw_state;
port_dpll        2907 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	struct icl_port_dpll *port_dpll =
port_dpll        2913 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!icl_calc_dpll_state(crtc_state, encoder, &port_dpll->hw_state)) {
port_dpll        2922 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll->pll = intel_find_shared_dpll(state, crtc,
port_dpll        2923 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 						&port_dpll->hw_state,
port_dpll        2927 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!port_dpll->pll) {
port_dpll        2934 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 				    port_dpll->pll, &port_dpll->hw_state);
port_dpll        2948 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	struct icl_port_dpll *port_dpll;
port_dpll        2951 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];
port_dpll        2952 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!icl_calc_dpll_state(crtc_state, encoder, &port_dpll->hw_state)) {
port_dpll        2957 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll->pll = intel_find_shared_dpll(state, crtc,
port_dpll        2958 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 						&port_dpll->hw_state,
port_dpll        2961 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!port_dpll->pll) {
port_dpll        2966 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 				    port_dpll->pll, &port_dpll->hw_state);
port_dpll        2969 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_MG_PHY];
port_dpll        2970 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!icl_calc_mg_pll_state(crtc_state, &port_dpll->hw_state)) {
port_dpll        2977 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll->pll = intel_find_shared_dpll(state, crtc,
port_dpll        2978 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 						&port_dpll->hw_state,
port_dpll        2981 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	if (!port_dpll->pll) {
port_dpll        2986 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 				    port_dpll->pll, &port_dpll->hw_state);
port_dpll        2993 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];
port_dpll        2994 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	intel_unreference_shared_dpll(state, crtc, port_dpll->pll);