port_base 613 drivers/ata/pdc_adma.c void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); port_base 614 drivers/ata/pdc_adma.c unsigned int offset = port_base - mmio_base; port_base 616 drivers/ata/pdc_adma.c adma_ata_setup_port(&ap->ioaddr, port_base); port_base 271 drivers/ata/sata_inic162x.c static void inic_reset_port(void __iomem *port_base) port_base 273 drivers/ata/sata_inic162x.c void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; port_base 288 drivers/ata/sata_inic162x.c writeb(0xff, port_base + PORT_IRQ_STAT); port_base 319 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 321 drivers/ata/sata_inic162x.c readb(port_base + PORT_RPQ_FIFO); port_base 322 drivers/ata/sata_inic162x.c readb(port_base + PORT_RPQ_CNT); port_base 323 drivers/ata/sata_inic162x.c writew(0, port_base + PORT_IDMA_CTL); port_base 384 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 390 drivers/ata/sata_inic162x.c irq_stat = readb(port_base + PORT_IRQ_STAT); port_base 391 drivers/ata/sata_inic162x.c writeb(irq_stat, port_base + PORT_IRQ_STAT); port_base 392 drivers/ata/sata_inic162x.c idma_stat = readw(port_base + PORT_IDMA_STAT); port_base 406 drivers/ata/sata_inic162x.c if (unlikely(readb(port_base + PORT_TF_COMMAND) & port_base 546 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 549 drivers/ata/sata_inic162x.c writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL); port_base 550 drivers/ata/sata_inic162x.c writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL); port_base 551 drivers/ata/sata_inic162x.c writeb(0, port_base + PORT_CPB_PTQFIFO); port_base 558 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 560 drivers/ata/sata_inic162x.c tf->feature = readb(port_base + PORT_TF_FEATURE); port_base 561 drivers/ata/sata_inic162x.c tf->nsect = readb(port_base + PORT_TF_NSECT); port_base 562 drivers/ata/sata_inic162x.c tf->lbal = readb(port_base + PORT_TF_LBAL); port_base 563 drivers/ata/sata_inic162x.c tf->lbam = readb(port_base + PORT_TF_LBAM); port_base 564 drivers/ata/sata_inic162x.c tf->lbah = readb(port_base + PORT_TF_LBAH); port_base 565 drivers/ata/sata_inic162x.c tf->device = readb(port_base + PORT_TF_DEVICE); port_base 566 drivers/ata/sata_inic162x.c tf->command = readb(port_base + PORT_TF_COMMAND); port_base 593 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 595 drivers/ata/sata_inic162x.c writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK); port_base 596 drivers/ata/sata_inic162x.c writeb(0xff, port_base + PORT_IRQ_STAT); port_base 601 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 603 drivers/ata/sata_inic162x.c writeb(0xff, port_base + PORT_IRQ_STAT); port_base 604 drivers/ata/sata_inic162x.c writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK); port_base 609 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(link->ap); port_base 611 drivers/ata/sata_inic162x.c return ata_check_ready(readb(port_base + PORT_TF_COMMAND)); port_base 622 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 623 drivers/ata/sata_inic162x.c void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; port_base 628 drivers/ata/sata_inic162x.c inic_reset_port(port_base); port_base 666 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 668 drivers/ata/sata_inic162x.c inic_reset_port(port_base); port_base 681 drivers/ata/sata_inic162x.c void __iomem *port_base = inic_port_base(ap); port_base 689 drivers/ata/sata_inic162x.c writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR); port_base 779 drivers/ata/sata_inic162x.c void __iomem *port_base = mmio_base + i * PORT_SIZE; port_base 781 drivers/ata/sata_inic162x.c writeb(0xff, port_base + PORT_IRQ_MASK); port_base 782 drivers/ata/sata_inic162x.c inic_reset_port(port_base); port_base 1286 drivers/ata/sata_mv.c void __iomem *port_base; port_base 1316 drivers/ata/sata_mv.c port_base = mv_port_base(mmio_base, p); port_base 1318 drivers/ata/sata_mv.c mv_dump_mem(port_base, 0x54); port_base 1320 drivers/ata/sata_mv.c mv_dump_mem(port_base+0x300, 0x60); port_base 54 drivers/net/dsa/dsa_loop.c unsigned int port_base; port_base 123 drivers/net/dsa/dsa_loop.c ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); port_base 139 drivers/net/dsa/dsa_loop.c ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); port_base 191 drivers/net/dsa/dsa_loop.c mdiobus_read(bus, ps->port_base + port, MII_BMSR); port_base 210 drivers/net/dsa/dsa_loop.c mdiobus_read(bus, ps->port_base + port, MII_BMSR); port_base 239 drivers/net/dsa/dsa_loop.c mdiobus_read(bus, ps->port_base + port, MII_BMSR); port_base 109 drivers/net/ethernet/hisilicon/hisi_femac.c void __iomem *port_base; port_base 161 drivers/net/ethernet/hisilicon/hisi_femac.c val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; port_base 176 drivers/net/ethernet/hisilicon/hisi_femac.c val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; port_base 204 drivers/net/ethernet/hisilicon/hisi_femac.c writel(status, priv->port_base + MAC_PORTSET); port_base 219 drivers/net/ethernet/hisilicon/hisi_femac.c while (readl(priv->port_base + ADDRQ_STAT) & BIT_RX_READY) { port_base 239 drivers/net/ethernet/hisilicon/hisi_femac.c writel(addr, priv->port_base + IQ_ADDR); port_base 255 drivers/net/ethernet/hisilicon/hisi_femac.c rx_pkt_info = readl(priv->port_base + IQFRM_DES); port_base 507 drivers/net/ethernet/hisilicon/hisi_femac.c val = readl(priv->port_base + ADDRQ_STAT); port_base 538 drivers/net/ethernet/hisilicon/hisi_femac.c writel(addr, priv->port_base + EQ_ADDR); port_base 539 drivers/net/ethernet/hisilicon/hisi_femac.c writel(skb->len + ETH_FCS_LEN, priv->port_base + EQFRM_LEN); port_base 752 drivers/net/ethernet/hisilicon/hisi_femac.c writel(val, priv->port_base + MAC_PORTSEL); port_base 767 drivers/net/ethernet/hisilicon/hisi_femac.c val = readl(priv->port_base + MAC_SET); port_base 770 drivers/net/ethernet/hisilicon/hisi_femac.c writel(val, priv->port_base + MAC_SET); port_base 774 drivers/net/ethernet/hisilicon/hisi_femac.c writel(val, priv->port_base + RX_COALESCE_SET); port_base 777 drivers/net/ethernet/hisilicon/hisi_femac.c writel(val, priv->port_base + QLEN_SET); port_base 801 drivers/net/ethernet/hisilicon/hisi_femac.c priv->port_base = devm_platform_ioremap_resource(pdev, 0); port_base 802 drivers/net/ethernet/hisilicon/hisi_femac.c if (IS_ERR(priv->port_base)) { port_base 803 drivers/net/ethernet/hisilicon/hisi_femac.c ret = PTR_ERR(priv->port_base); port_base 266 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base; port_base 308 drivers/net/ethernet/silan/sc92031.c static inline void _sc92031_dummy_read(void __iomem *port_base) port_base 310 drivers/net/ethernet/silan/sc92031.c ioread32(port_base + MAC0); port_base 313 drivers/net/ethernet/silan/sc92031.c static u32 _sc92031_mii_wait(void __iomem *port_base) port_base 319 drivers/net/ethernet/silan/sc92031.c mii_status = ioread32(port_base + Miistatus); port_base 325 drivers/net/ethernet/silan/sc92031.c static u32 _sc92031_mii_cmd(void __iomem *port_base, u32 cmd0, u32 cmd1) port_base 327 drivers/net/ethernet/silan/sc92031.c iowrite32(Mii_Divider, port_base + Miicmd0); port_base 329 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_wait(port_base); port_base 331 drivers/net/ethernet/silan/sc92031.c iowrite32(cmd1, port_base + Miicmd1); port_base 332 drivers/net/ethernet/silan/sc92031.c iowrite32(Mii_Divider | cmd0, port_base + Miicmd0); port_base 334 drivers/net/ethernet/silan/sc92031.c return _sc92031_mii_wait(port_base); port_base 337 drivers/net/ethernet/silan/sc92031.c static void _sc92031_mii_scan(void __iomem *port_base) port_base 339 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_cmd(port_base, Mii_SCAN, 0x1 << 6); port_base 342 drivers/net/ethernet/silan/sc92031.c static u16 _sc92031_mii_read(void __iomem *port_base, unsigned reg) port_base 344 drivers/net/ethernet/silan/sc92031.c return _sc92031_mii_cmd(port_base, Mii_READ, reg << 6) >> 13; port_base 347 drivers/net/ethernet/silan/sc92031.c static void _sc92031_mii_write(void __iomem *port_base, unsigned reg, u16 val) port_base 349 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_cmd(port_base, Mii_WRITE, (reg << 6) | ((u32)val << 11)); port_base 355 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 362 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + IntrMask); port_base 363 drivers/net/ethernet/silan/sc92031.c _sc92031_dummy_read(port_base); port_base 373 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 380 drivers/net/ethernet/silan/sc92031.c iowrite32(IntrBits, port_base + IntrMask); port_base 386 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 390 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->rx_config, port_base + RxConfig); port_base 391 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->tx_config, port_base + TxConfig); port_base 397 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 401 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->rx_config, port_base + RxConfig); port_base 402 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->tx_config, port_base + TxConfig); port_base 419 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 450 drivers/net/ethernet/silan/sc92031.c iowrite32(mar0, port_base + MAR0); port_base 451 drivers/net/ethernet/silan/sc92031.c iowrite32(mar1, port_base + MAR0 + 4); port_base 457 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 481 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->rx_config, port_base + RxConfig); port_base 487 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 490 drivers/net/ethernet/silan/sc92031.c bmsr = _sc92031_mii_read(port_base, MII_BMSR); port_base 495 drivers/net/ethernet/silan/sc92031.c u16 output_status = _sc92031_mii_read(port_base, port_base 497 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_scan(port_base); port_base 526 drivers/net/ethernet/silan/sc92031.c iowrite32(flow_ctrl_config, port_base + FlowCtrlConfig); port_base 537 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_scan(port_base); port_base 552 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 555 drivers/net/ethernet/silan/sc92031.c phy_ctrl = ioread32(port_base + PhyCtrl); port_base 578 drivers/net/ethernet/silan/sc92031.c iowrite32(phy_ctrl, port_base + PhyCtrl); port_base 582 drivers/net/ethernet/silan/sc92031.c iowrite32(phy_ctrl, port_base + PhyCtrl); port_base 585 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_write(port_base, MII_JAB, port_base 587 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_scan(port_base); port_base 596 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 599 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + PMConfig); port_base 602 drivers/net/ethernet/silan/sc92031.c iowrite32(Cfg0_Reset, port_base + Config0); port_base 605 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + Config0); port_base 609 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + IntrMask); port_base 612 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + MAR0); port_base 613 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + MAR0 + 4); port_base 616 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->rx_ring_dma_addr, port_base + RxbufAddr); port_base 631 drivers/net/ethernet/silan/sc92031.c iowrite32(Cfg1_Rcv64K, port_base + Config1); port_base 640 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->pm_config, port_base + PMConfig); port_base 643 drivers/net/ethernet/silan/sc92031.c ioread32(port_base + IntrStatus); port_base 649 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 658 drivers/net/ethernet/silan/sc92031.c tx_status = ioread32(port_base + TxStatus0 + entry * 4); port_base 722 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 729 drivers/net/ethernet/silan/sc92031.c rx_ring_head = ioread32(port_base + RxBufWPtr); port_base 819 drivers/net/ethernet/silan/sc92031.c iowrite32(priv->rx_ring_tail, port_base + RxBufRPtr); port_base 836 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 867 drivers/net/ethernet/silan/sc92031.c iowrite32(intr_mask, port_base + IntrMask); port_base 876 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 880 drivers/net/ethernet/silan/sc92031.c iowrite32(0, port_base + IntrMask); port_base 881 drivers/net/ethernet/silan/sc92031.c _sc92031_dummy_read(port_base); port_base 883 drivers/net/ethernet/silan/sc92031.c intr_status = ioread32(port_base + IntrStatus); port_base 900 drivers/net/ethernet/silan/sc92031.c iowrite32(intr_mask, port_base + IntrMask); port_base 908 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 917 drivers/net/ethernet/silan/sc92031.c temp = (ioread32(port_base + RxStatus0) >> 16) & 0xffff; port_base 935 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 975 drivers/net/ethernet/silan/sc92031.c port_base + TxAddr0 + entry * 4); port_base 976 drivers/net/ethernet/silan/sc92031.c iowrite32(tx_status, port_base + TxStatus0 + entry * 4); port_base 1121 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 1129 drivers/net/ethernet/silan/sc92031.c phy_address = ioread32(port_base + Miicmd1) >> 27; port_base 1130 drivers/net/ethernet/silan/sc92031.c phy_ctrl = ioread32(port_base + PhyCtrl); port_base 1132 drivers/net/ethernet/silan/sc92031.c output_status = _sc92031_mii_read(port_base, MII_OutputStatus); port_base 1133 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_scan(port_base); port_base 1184 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 1242 drivers/net/ethernet/silan/sc92031.c old_phy_ctrl = ioread32(port_base + PhyCtrl); port_base 1246 drivers/net/ethernet/silan/sc92031.c iowrite32(phy_ctrl, port_base + PhyCtrl); port_base 1257 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 1261 drivers/net/ethernet/silan/sc92031.c pm_config = ioread32(port_base + PMConfig); port_base 1284 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 1289 drivers/net/ethernet/silan/sc92031.c pm_config = ioread32(port_base + PMConfig) port_base 1303 drivers/net/ethernet/silan/sc92031.c iowrite32(pm_config, port_base + PMConfig); port_base 1314 drivers/net/ethernet/silan/sc92031.c void __iomem *port_base = priv->port_base; port_base 1319 drivers/net/ethernet/silan/sc92031.c bmcr = _sc92031_mii_read(port_base, MII_BMCR); port_base 1325 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_write(port_base, MII_BMCR, bmcr | BMCR_ANRESTART); port_base 1328 drivers/net/ethernet/silan/sc92031.c _sc92031_mii_scan(port_base); port_base 1399 drivers/net/ethernet/silan/sc92031.c void __iomem* port_base; port_base 1422 drivers/net/ethernet/silan/sc92031.c port_base = pci_iomap(pdev, SC92031_USE_PIO, 0); port_base 1423 drivers/net/ethernet/silan/sc92031.c if (unlikely(!port_base)) { port_base 1447 drivers/net/ethernet/silan/sc92031.c priv->port_base = port_base; port_base 1455 drivers/net/ethernet/silan/sc92031.c iowrite32((~PM_LongWF & ~PM_LWPTN) | PM_Enable, port_base + PMConfig); port_base 1457 drivers/net/ethernet/silan/sc92031.c mac0 = ioread32(port_base + MAC0); port_base 1458 drivers/net/ethernet/silan/sc92031.c mac1 = ioread32(port_base + MAC0 + 4); port_base 1479 drivers/net/ethernet/silan/sc92031.c pci_iounmap(pdev, port_base); port_base 1493 drivers/net/ethernet/silan/sc92031.c void __iomem* port_base = priv->port_base; port_base 1497 drivers/net/ethernet/silan/sc92031.c pci_iounmap(pdev, port_base); port_base 292 drivers/phy/mediatek/phy-mtk-tphy.c void __iomem *port_base; port_base 795 drivers/phy/mediatek/phy-mtk-tphy.c u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM; port_base 801 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; port_base 802 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA; port_base 805 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; port_base 821 drivers/phy/mediatek/phy-mtk-tphy.c u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC; port_base 822 drivers/phy/mediatek/phy-mtk-tphy.c u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ; port_base 823 drivers/phy/mediatek/phy-mtk-tphy.c u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM; port_base 827 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC; port_base 828 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP; port_base 829 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD; port_base 830 drivers/phy/mediatek/phy-mtk-tphy.c u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA; port_base 1144 drivers/phy/mediatek/phy-mtk-tphy.c instance->port_base = devm_ioremap_resource(&phy->dev, &res); port_base 1145 drivers/phy/mediatek/phy-mtk-tphy.c if (IS_ERR(instance->port_base)) { port_base 1147 drivers/phy/mediatek/phy-mtk-tphy.c retval = PTR_ERR(instance->port_base); port_base 93 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *port_base; port_base 119 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 194 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 210 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 229 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 251 drivers/phy/mediatek/phy-mtk-xsphy.c tmp = readl(inst->port_base + XSP_U2PHYDTM1); port_base 266 drivers/phy/mediatek/phy-mtk-xsphy.c writel(tmp, inst->port_base + XSP_U2PHYDTM1); port_base 308 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 343 drivers/phy/mediatek/phy-mtk-xsphy.c void __iomem *pbase = inst->port_base; port_base 560 drivers/phy/mediatek/phy-mtk-xsphy.c inst->port_base = devm_ioremap_resource(&phy->dev, &res); port_base 561 drivers/phy/mediatek/phy-mtk-xsphy.c if (IS_ERR(inst->port_base)) { port_base 563 drivers/phy/mediatek/phy-mtk-xsphy.c retval = PTR_ERR(inst->port_base); port_base 350 drivers/scsi/pcmcia/sym53c500_cs.c int port_base = dev->io_port; port_base 360 drivers/scsi/pcmcia/sym53c500_cs.c REG1(port_base); port_base 361 drivers/scsi/pcmcia/sym53c500_cs.c pio_status = inb(port_base + PIO_STATUS); port_base 362 drivers/scsi/pcmcia/sym53c500_cs.c REG0(port_base); port_base 363 drivers/scsi/pcmcia/sym53c500_cs.c status = inb(port_base + STAT_REG); port_base 364 drivers/scsi/pcmcia/sym53c500_cs.c DEB(seq_reg = inb(port_base + SEQ_REG)); port_base 365 drivers/scsi/pcmcia/sym53c500_cs.c int_reg = inb(port_base + INT_REG); port_base 366 drivers/scsi/pcmcia/sym53c500_cs.c DEB(fifo_size = inb(port_base + FIFO_FLAGS) & 0x1f); port_base 417 drivers/scsi/pcmcia/sym53c500_cs.c outb(FLUSH_FIFO, port_base + CMD_REG); port_base 418 drivers/scsi/pcmcia/sym53c500_cs.c LOAD_DMA_COUNT(port_base, scsi_bufflen(curSC)); /* Max transfer size */ port_base 419 drivers/scsi/pcmcia/sym53c500_cs.c outb(TRANSFER_INFO | DMA_OP, port_base + CMD_REG); port_base 422 drivers/scsi/pcmcia/sym53c500_cs.c SYM53C500_pio_write(fast_pio, port_base, port_base 425 drivers/scsi/pcmcia/sym53c500_cs.c REG0(port_base); port_base 436 drivers/scsi/pcmcia/sym53c500_cs.c outb(FLUSH_FIFO, port_base + CMD_REG); port_base 437 drivers/scsi/pcmcia/sym53c500_cs.c LOAD_DMA_COUNT(port_base, scsi_bufflen(curSC)); /* Max transfer size */ port_base 438 drivers/scsi/pcmcia/sym53c500_cs.c outb(TRANSFER_INFO | DMA_OP, port_base + CMD_REG); port_base 441 drivers/scsi/pcmcia/sym53c500_cs.c SYM53C500_pio_read(fast_pio, port_base, port_base 444 drivers/scsi/pcmcia/sym53c500_cs.c REG0(port_base); port_base 456 drivers/scsi/pcmcia/sym53c500_cs.c outb(FLUSH_FIFO, port_base + CMD_REG); port_base 457 drivers/scsi/pcmcia/sym53c500_cs.c outb(INIT_CMD_COMPLETE, port_base + CMD_REG); port_base 468 drivers/scsi/pcmcia/sym53c500_cs.c outb(SET_ATN, port_base + CMD_REG); /* Reject the message */ port_base 469 drivers/scsi/pcmcia/sym53c500_cs.c outb(MSG_ACCEPT, port_base + CMD_REG); port_base 476 drivers/scsi/pcmcia/sym53c500_cs.c curSC->SCp.Status = inb(port_base + SCSI_FIFO); port_base 477 drivers/scsi/pcmcia/sym53c500_cs.c curSC->SCp.Message = inb(port_base + SCSI_FIFO); port_base 479 drivers/scsi/pcmcia/sym53c500_cs.c VDEB(printk("SCSI FIFO size=%d\n", inb(port_base + FIFO_FLAGS) & 0x1f)); port_base 483 drivers/scsi/pcmcia/sym53c500_cs.c outb(SET_ATN, port_base + CMD_REG); /* Reject message */ port_base 486 drivers/scsi/pcmcia/sym53c500_cs.c outb(MSG_ACCEPT, port_base + CMD_REG); port_base 544 drivers/scsi/pcmcia/sym53c500_cs.c int port_base = SCpnt->device->host->io_port; port_base 565 drivers/scsi/pcmcia/sym53c500_cs.c REG0(port_base); port_base 566 drivers/scsi/pcmcia/sym53c500_cs.c outb(scmd_id(SCpnt), port_base + DEST_ID); /* set destination */ port_base 567 drivers/scsi/pcmcia/sym53c500_cs.c outb(FLUSH_FIFO, port_base + CMD_REG); /* reset the fifos */ port_base 570 drivers/scsi/pcmcia/sym53c500_cs.c outb(SCpnt->cmnd[i], port_base + SCSI_FIFO); port_base 572 drivers/scsi/pcmcia/sym53c500_cs.c outb(SELECT_NO_ATN, port_base + CMD_REG); port_base 582 drivers/scsi/pcmcia/sym53c500_cs.c int port_base = SCpnt->device->host->io_port; port_base 586 drivers/scsi/pcmcia/sym53c500_cs.c SYM53C500_int_host_reset(port_base); port_base 694 drivers/scsi/pcmcia/sym53c500_cs.c int irq_level, port_base; port_base 738 drivers/scsi/pcmcia/sym53c500_cs.c port_base = link->resource[0]->start; port_base 742 drivers/scsi/pcmcia/sym53c500_cs.c port_base, irq_level, USE_FAST_PIO);) port_base 744 drivers/scsi/pcmcia/sym53c500_cs.c chip_init(port_base); port_base 768 drivers/scsi/pcmcia/sym53c500_cs.c host->unique_id = port_base; port_base 770 drivers/scsi/pcmcia/sym53c500_cs.c host->io_port = port_base; port_base 794 drivers/scsi/pcmcia/sym53c500_cs.c release_region(port_base, 0x10); port_base 88 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c void __iomem *port_base; port_base 329 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c void __iomem *port_base; port_base 354 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c port_base = devm_ioremap_resource(dev, res); port_base 355 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c if (IS_ERR(port_base)) { port_base 357 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c return PTR_ERR(port_base); port_base 360 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c phy->regmap = devm_regmap_init_mmio(phy->dev, port_base, port_base 381 drivers/staging/mt7621-pci-phy/pci-mt7621-phy.c instance->port_base = port_base;