pool_size 100 arch/arm/mach-iop32x/adma.c .pool_size = PAGE_SIZE, pool_size 105 arch/arm/mach-iop32x/adma.c .pool_size = PAGE_SIZE, pool_size 110 arch/arm/mach-iop32x/adma.c .pool_size = 3 * PAGE_SIZE, pool_size 49 arch/m68k/atari/stram.c static unsigned long pool_size = 1024*1024; pool_size 58 arch/m68k/atari/stram.c pool_size = memparse(arg, NULL); pool_size 98 arch/m68k/atari/stram.c stram_pool.start = (resource_size_t)memblock_alloc_low(pool_size, pool_size 102 arch/m68k/atari/stram.c __func__, pool_size, PAGE_SIZE); pool_size 104 arch/m68k/atari/stram.c stram_pool.end = stram_pool.start + pool_size - 1; pool_size 108 arch/m68k/atari/stram.c pool_size, &stram_pool); pool_size 127 arch/m68k/atari/stram.c stram_pool.end = stram_pool.start + pool_size - 1; pool_size 132 arch/m68k/atari/stram.c pool_size, &stram_pool); pool_size 114 arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c int pool_size) pool_size 137 arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c if ((pool_size < 128) || (pool_size > 65536)) pool_size 156 arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c if ((pool_size >> 3) - 1 != qstate->pool_size_m1) { pool_size 185 arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c qstate->pool_size_m1 = (pool_size >> 3) - 1; pool_size 172 arch/mips/include/asm/octeon/cvmx-cmd-queue.h int pool_size); pool_size 442 arch/powerpc/include/asm/hvcall.h unsigned long pool_size; pool_size 1889 arch/powerpc/platforms/pseries/lpar.c mpp_data->pool_size = retbuf[4]; pool_size 247 arch/powerpc/platforms/pseries/lparcfg.c if (mpp_data.pool_size != -1) pool_size 249 arch/powerpc/platforms/pseries/lparcfg.c mpp_data.pool_size); pool_size 428 block/bio-integrity.c int bioset_integrity_create(struct bio_set *bs, int pool_size) pool_size 434 block/bio-integrity.c pool_size, bip_slab)) pool_size 437 block/bio-integrity.c if (biovec_init_pool(&bs->bvec_integrity_pool, pool_size)) { pool_size 1996 block/bio.c unsigned int pool_size, pool_size 2012 block/bio.c if (mempool_init_slab_pool(&bs->bio_pool, pool_size, bs->bio_slab)) pool_size 2016 block/bio.c biovec_init_pool(&bs->bvec_pool, pool_size)) pool_size 2301 drivers/atm/fore200e.c int pool_size, int supply_blksize) pool_size 2307 drivers/atm/fore200e.c fore200e->bus->write(pool_size, &bs_spec->pool_size); pool_size 660 drivers/atm/fore200e.h u32 pool_size; /* number of rbds */ pool_size 715 drivers/char/random.c const int pool_size = r->poolinfo->poolfracbits; pool_size 753 drivers/char/random.c unsigned int anfrac = min(pnfrac, pool_size/2); pool_size 755 drivers/char/random.c ((pool_size - entropy_count)*anfrac*3) >> s; pool_size 759 drivers/char/random.c } while (unlikely(entropy_count < pool_size-2 && pnfrac)); pool_size 767 drivers/char/random.c } else if (entropy_count > pool_size) pool_size 768 drivers/char/random.c entropy_count = pool_size; pool_size 426 drivers/dma/iop-adma.c int num_descs_in_pool = plat_data->pool_size/IOP_ADMA_SLOT_SIZE; pool_size 1251 drivers/dma/iop-adma.c dma_free_coherent(&dev->dev, plat_data->pool_size, pool_size 1292 drivers/dma/iop-adma.c plat_data->pool_size, pool_size 1427 drivers/dma/iop-adma.c dma_free_coherent(&adev->pdev->dev, plat_data->pool_size, pool_size 117 drivers/dma/mv_xor.h size_t pool_size; pool_size 1785 drivers/dma/ppc4xx/adma.c for (; i < (ppc440spe_chan->device->pool_size / db_sz); i++) { pool_size 4018 drivers/dma/ppc4xx/adma.c u32 id, pool_size; pool_size 4026 drivers/dma/ppc4xx/adma.c pool_size = PAGE_SIZE << 1; pool_size 4048 drivers/dma/ppc4xx/adma.c pool_size = (id == PPC440SPE_DMA0_ID) ? pool_size 4050 drivers/dma/ppc4xx/adma.c pool_size <<= 2; pool_size 4078 drivers/dma/ppc4xx/adma.c adev->pool_size = pool_size; pool_size 4081 drivers/dma/ppc4xx/adma.c adev->pool_size, &adev->dma_desc_pool, pool_size 4086 drivers/dma/ppc4xx/adma.c adev->pool_size); pool_size 4220 drivers/dma/ppc4xx/adma.c dma_free_coherent(adev->dev, adev->pool_size, pool_size 4276 drivers/dma/ppc4xx/adma.c dma_free_coherent(adev->dev, adev->pool_size, pool_size 70 drivers/dma/ppc4xx/adma.h size_t pool_size; pool_size 835 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c smu->pool_size = adev->pm.smu_prv_buffer_size; pool_size 1182 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c uint64_t pool_size = smu->pool_size; pool_size 1185 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c if (pool_size == SMU_MEMORY_POOL_SIZE_ZERO) pool_size 1188 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c memory_pool->size = pool_size; pool_size 1192 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c switch (pool_size) { pool_size 349 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h uint64_t pool_size; pool_size 86 drivers/infiniband/core/fmr_pool.c int pool_size; pool_size 243 drivers/infiniband/core/fmr_pool.c pool->pool_size = 0; pool_size 274 drivers/infiniband/core/fmr_pool.c for (i = 0; i < params->pool_size; ++i) { pool_size 293 drivers/infiniband/core/fmr_pool.c ++pool->pool_size; pool_size 341 drivers/infiniband/core/fmr_pool.c if (i < pool->pool_size) pool_size 343 drivers/infiniband/core/fmr_pool.c pool->pool_size - i); pool_size 372 drivers/infiniband/hw/efa/efa_com.c size_t pool_size = aq->depth * sizeof(*aq->comp_ctx_pool); pool_size 378 drivers/infiniband/hw/efa/efa_com.c aq->comp_ctx_pool = devm_kzalloc(aq->dmadev, pool_size, GFP_KERNEL); pool_size 187 drivers/infiniband/ulp/iser/iser_verbs.c params.pool_size = cmds_max * 2; pool_size 397 drivers/infiniband/ulp/srp/ib_srp.c fmr_param.pool_size = target->mr_pool_size; pool_size 398 drivers/infiniband/ulp/srp/ib_srp.c fmr_param.dirty_watermark = fmr_param.pool_size / 4; pool_size 436 drivers/infiniband/ulp/srp/ib_srp.c struct ib_pd *pd, int pool_size, pool_size 445 drivers/infiniband/ulp/srp/ib_srp.c if (pool_size <= 0) pool_size 448 drivers/infiniband/ulp/srp/ib_srp.c pool = kzalloc(struct_size(pool, desc, pool_size), GFP_KERNEL); pool_size 451 drivers/infiniband/ulp/srp/ib_srp.c pool->size = pool_size; pool_size 2992 drivers/md/dm.c unsigned int pool_size = 0; pool_size 3003 drivers/md/dm.c pool_size = max(dm_get_reserved_bio_based_ios(), min_pool_size); pool_size 3006 drivers/md/dm.c ret = bioset_init(&pools->io_bs, pool_size, io_front_pad, 0); pool_size 3009 drivers/md/dm.c if (integrity && bioset_integrity_create(&pools->io_bs, pool_size)) pool_size 3013 drivers/md/dm.c pool_size = max(dm_get_reserved_rq_based_ios(), min_pool_size); pool_size 3021 drivers/md/dm.c ret = bioset_init(&pools->bs, pool_size, front_pad, 0); pool_size 3025 drivers/md/dm.c if (integrity && bioset_integrity_create(&pools->bs, pool_size)) pool_size 455 drivers/md/raid5.c int num = sh->raid_conf->pool_size; pool_size 470 drivers/md/raid5.c int num = sh->raid_conf->pool_size; pool_size 2169 drivers/md/raid5.c sh = alloc_stripe(conf->slab_cache, gfp, conf->pool_size, conf); pool_size 2209 drivers/md/raid5.c conf->pool_size = devs; pool_size 2363 drivers/md/raid5.c for(i=0; i<conf->pool_size; i++) { pool_size 2385 drivers/md/raid5.c for (i = 0; i < conf->pool_size; i++) pool_size 2388 drivers/md/raid5.c for (i = conf->pool_size; i < newsize; i++) { pool_size 2395 drivers/md/raid5.c for (i = conf->pool_size; i < newsize; i++) pool_size 2429 drivers/md/raid5.c conf->pool_size = newsize; pool_size 6804 drivers/md/raid5.c for (i = 0; i < conf->pool_size; i++) pool_size 7856 drivers/md/raid5.c if (conf->previous_raid_disks + mddev->delta_disks <= conf->pool_size) pool_size 8359 drivers/md/raid5.c err = resize_stripes(conf, conf->pool_size); pool_size 8370 drivers/md/raid5.c err = resize_stripes(conf, conf->pool_size); pool_size 668 drivers/md/raid5.h int pool_size; /* number of disks in stripeheads in pool */ pool_size 664 drivers/misc/ibmvmc.c crq_msg.pool_size = cpu_to_be16(ibmvmc_max_buf_pool_size); pool_size 1716 drivers/misc/ibmvmc.c be16_to_cpu(crq->pool_size)); pool_size 111 drivers/misc/ibmvmc.h __be16 pool_size; /* Maximum number of buffers supported per HMC pool_size 401 drivers/mtd/ubi/fastmap.c __be32 *pebs, int pool_size, unsigned long long *max_sqnum, pool_size 422 drivers/mtd/ubi/fastmap.c dbg_bld("scanning fastmap pool: size = %i", pool_size); pool_size 428 drivers/mtd/ubi/fastmap.c for (i = 0; i < pool_size; i++) { pool_size 559 drivers/mtd/ubi/fastmap.c int ret, i, j, pool_size, wl_pool_size; pool_size 605 drivers/mtd/ubi/fastmap.c pool_size = be16_to_cpu(fmpl->size); pool_size 610 drivers/mtd/ubi/fastmap.c if (pool_size > UBI_FM_MAX_POOL_SIZE || pool_size < 0) { pool_size 611 drivers/mtd/ubi/fastmap.c ubi_err(ubi, "bad pool size: %i", pool_size); pool_size 755 drivers/mtd/ubi/fastmap.c ret = scan_pool(ubi, ai, fmpl->pebs, pool_size, &max_sqnum, &free); pool_size 2807 drivers/net/ethernet/broadcom/bnxt/bnxt.c pp.pool_size = bp->rx_ring_size; pool_size 146 drivers/net/ethernet/ibm/ibmveth.c u32 pool_index, u32 pool_size, pool_size 149 drivers/net/ethernet/ibm/ibmveth.c pool->size = pool_size; pool_size 152 drivers/net/ethernet/ibm/ibmveth.c pool->threshold = pool_size * 7 / 8; pool_size 1697 drivers/net/ethernet/ibm/ibmveth.c pool_count[i], pool_size[i], pool_size 102 drivers/net/ethernet/ibm/ibmveth.h static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 }; pool_size 386 drivers/net/ethernet/mellanox/mlx5/core/en_main.c u32 pool_size; pool_size 428 drivers/net/ethernet/mellanox/mlx5/core/en_main.c pool_size = 1 << params->log_rq_mtu_frames; pool_size 445 drivers/net/ethernet/mellanox/mlx5/core/en_main.c pool_size = MLX5_MPWRQ_PAGES_PER_WQE << pool_size 550 drivers/net/ethernet/mellanox/mlx5/core/en_main.c pp_params.pool_size = pool_size; pool_size 1009 drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c u32 pool_size = mlxsw_sp_bytes_cells(mlxsw_sp, size); pool_size 1032 drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c pool_size, false); pool_size 19 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c unsigned int pool_size; pool_size 36 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c unsigned int pool_size; pool_size 39 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c pool_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, COUNTER_POOL_SIZE); pool_size 43 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c if (total_bank_config > pool_size / MLXSW_SP_COUNTER_POOL_BANK_SIZE + 1) pool_size 91 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c pool->pool_size = MLXSW_CORE_RES_GET(mlxsw_sp->core, COUNTER_POOL_SIZE); pool_size 92 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c map_size = BITS_TO_LONGS(pool->pool_size) * sizeof(unsigned long); pool_size 112 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c if (sub_pool->base_index + sub_pool->size > pool->pool_size) pool_size 113 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c sub_pool->size = pool->pool_size - sub_pool->base_index; pool_size 128 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c WARN_ON(find_first_bit(pool->usage, pool->pool_size) != pool_size 129 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c pool->pool_size); pool_size 171 drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c if (WARN_ON(counter_index >= pool->pool_size)) pool_size 1116 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size--; pool_size 1133 drivers/net/ethernet/neterion/vxge/vxge-config.c u32 pool_size, pool_size 1151 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size = 0; pool_size 1158 drivers/net/ethernet/neterion/vxge/vxge-config.c for (i = 0; i < pool_size + pool_max; i++) { pool_size 1169 drivers/net/ethernet/neterion/vxge/vxge-config.c for (i = 0; i < pool_size; i++) { pool_size 1210 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size++; pool_size 2294 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size++; pool_size 2327 drivers/net/ethernet/neterion/vxge/vxge-config.c if ((blockpool->pool_size + blockpool->req_out) < pool_size 2390 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size--; pool_size 2410 drivers/net/ethernet/neterion/vxge/vxge-config.c if (blockpool->pool_size < blockpool->pool_max) pool_size 2428 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size--; pool_size 2473 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size++; pool_size 4778 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size--; pool_size 4952 drivers/net/ethernet/neterion/vxge/vxge-config.c blockpool->pool_size++; pool_size 555 drivers/net/ethernet/neterion/vxge/vxge-config.h u32 pool_size; pool_size 1280 drivers/net/ethernet/socionext/netsec.c pp_params.pool_size = DESC_NUM; pool_size 1557 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c pp_params.pool_size = DMA_RX_SIZE; pool_size 563 drivers/net/ethernet/ti/cpsw.c pp_params.pool_size = size; pool_size 609 drivers/net/ethernet/ti/cpsw.c int ret = 0, pool_size; pool_size 611 drivers/net/ethernet/ti/cpsw.c pool_size = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch); pool_size 612 drivers/net/ethernet/ti/cpsw.c pool = cpsw_create_page_pool(cpsw, pool_size); pool_size 5249 drivers/net/wireless/ath/ath10k/wmi.c u32 pool_size; pool_size 5253 drivers/net/wireless/ath/ath10k/wmi.c pool_size = num_units * round_up(unit_len, 4); pool_size 5254 drivers/net/wireless/ath/ath10k/wmi.c vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL); pool_size 5261 drivers/net/wireless/ath/ath10k/wmi.c ar->wmi.mem_chunks[idx].len = pool_size; pool_size 5290 drivers/net/wireless/ath/ath10k/wmi.c u32 pool_size; pool_size 5317 drivers/net/wireless/ath/ath10k/wmi.c pool_size = num_units * round_up(unit_size, 4); pool_size 5318 drivers/net/wireless/ath/ath10k/wmi.c if (ar->wmi.mem_chunks[j].len == pool_size) { pool_size 2453 drivers/scsi/libfc/fc_exch.c size_t pool_size; pool_size 2502 drivers/scsi/libfc/fc_exch.c pool_size = sizeof(*pool) + pool_exch_range * sizeof(struct fc_exch *); pool_size 2503 drivers/scsi/libfc/fc_exch.c mp->pool = __alloc_percpu(pool_size, __alignof__(struct fc_exch_pool)); pool_size 767 include/linux/bio.h static inline int bioset_integrity_create(struct bio_set *bs, int pool_size) pool_size 103 include/linux/platform_data/dma-iop32x.h size_t pool_size; pool_size 64 include/net/page_pool.h unsigned int pool_size; pool_size 59 include/rdma/ib_fmr_pool.h int pool_size; pool_size 35 net/core/page_pool.c if (pool->p.pool_size) pool_size 36 net/core/page_pool.c ring_qsize = pool->p.pool_size;