pmisc_bar_addr    113 drivers/crypto/qat/qat_common/adf_isr.c 		void __iomem *pmisc_bar_addr = pmisc->virt_addr;
pmisc_bar_addr    117 drivers/crypto/qat/qat_common/adf_isr.c 		vf_mask = ((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU5) &
pmisc_bar_addr    119 drivers/crypto/qat/qat_common/adf_isr.c 			  ((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU3) &
pmisc_bar_addr     63 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	void __iomem *pmisc_bar_addr =
pmisc_bar_addr     66 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x0);
pmisc_bar_addr     73 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	void __iomem *pmisc_bar_addr =
pmisc_bar_addr     76 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	ADF_CSR_WR(pmisc_bar_addr, hw_data->get_vintmsk_offset(0), 0x2);
pmisc_bar_addr    130 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	void __iomem *pmisc_bar_addr =
pmisc_bar_addr    160 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset);
pmisc_bar_addr    171 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, msg);
pmisc_bar_addr    176 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset);
pmisc_bar_addr    190 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, msg | int_bit);
pmisc_bar_addr    195 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 		val = ADF_CSR_RD(pmisc_bar_addr, pf2vf_offset);
pmisc_bar_addr    205 drivers/crypto/qat/qat_common/adf_pf2vf_msg.c 	ADF_CSR_WR(pmisc_bar_addr, pf2vf_offset, val & ~local_in_use_mask);
pmisc_bar_addr     66 drivers/crypto/qat/qat_common/adf_sriov.c #define READ_CSR_ME2FUNCTION_MAP_A(pmisc_bar_addr, index)		\
pmisc_bar_addr     67 drivers/crypto/qat/qat_common/adf_sriov.c 	ADF_CSR_RD(pmisc_bar_addr, ME2FUNCTION_MAP_A_OFFSET +		\
pmisc_bar_addr     70 drivers/crypto/qat/qat_common/adf_sriov.c #define WRITE_CSR_ME2FUNCTION_MAP_A(pmisc_bar_addr, index, value)	\
pmisc_bar_addr     71 drivers/crypto/qat/qat_common/adf_sriov.c 	ADF_CSR_WR(pmisc_bar_addr, ME2FUNCTION_MAP_A_OFFSET +		\
pmisc_bar_addr     74 drivers/crypto/qat/qat_common/adf_sriov.c #define READ_CSR_ME2FUNCTION_MAP_B(pmisc_bar_addr, index)		\
pmisc_bar_addr     75 drivers/crypto/qat/qat_common/adf_sriov.c 	ADF_CSR_RD(pmisc_bar_addr, ME2FUNCTION_MAP_B_OFFSET +		\
pmisc_bar_addr     78 drivers/crypto/qat/qat_common/adf_sriov.c #define WRITE_CSR_ME2FUNCTION_MAP_B(pmisc_bar_addr, index, value)	\
pmisc_bar_addr     79 drivers/crypto/qat/qat_common/adf_sriov.c 	ADF_CSR_WR(pmisc_bar_addr, ME2FUNCTION_MAP_B_OFFSET +		\
pmisc_bar_addr    121 drivers/crypto/qat/qat_common/adf_vf_isr.c 	void __iomem *pmisc_bar_addr = pmisc->virt_addr;
pmisc_bar_addr    125 drivers/crypto/qat/qat_common/adf_vf_isr.c 	msg = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_pf2vf_offset(0));
pmisc_bar_addr    152 drivers/crypto/qat/qat_common/adf_vf_isr.c 		ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
pmisc_bar_addr    172 drivers/crypto/qat/qat_common/adf_vf_isr.c 	ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
pmisc_bar_addr    205 drivers/crypto/qat/qat_common/adf_vf_isr.c 	void __iomem *pmisc_bar_addr = pmisc->virt_addr;
pmisc_bar_addr    209 drivers/crypto/qat/qat_common/adf_vf_isr.c 	v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET);