PWR_BASE           51 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c 		adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i]));
PWR_BASE          198 drivers/gpu/drm/amd/include/vega10_ip_offset.h static const struct IP_BASE PWR_BASE			= { { { { 0x00016A00, 0, 0, 0, 0 } },