pm_fuse_table_offset  674 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset  682 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END)) {
pm_fuse_table_offset  696 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		ret |= ci_populate_dw8(hwmgr, pm_fuse_table_offset);
pm_fuse_table_offset  698 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		ret |= ci_populate_fuzzy_fan(hwmgr, pm_fuse_table_offset);
pm_fuse_table_offset  706 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		ret = ci_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset  693 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset  701 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END))
pm_fuse_table_offset  716 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		if (fiji_populate_dw8(hwmgr, pm_fuse_table_offset))
pm_fuse_table_offset  746 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset  438 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset  445 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END))
pm_fuse_table_offset  472 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		if (iceland_populate_dw8(hwmgr, pm_fuse_table_offset))
pm_fuse_table_offset  496 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset  589 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset  596 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END))
pm_fuse_table_offset  610 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		if (polaris10_populate_dw8(hwmgr, pm_fuse_table_offset))
pm_fuse_table_offset  636 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset 1998 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset 2005 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END))
pm_fuse_table_offset 2021 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		if (tonga_populate_dw8(hwmgr, pm_fuse_table_offset))
pm_fuse_table_offset 2053 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset 1854 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	uint32_t pm_fuse_table_offset;
pm_fuse_table_offset 1861 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				&pm_fuse_table_offset, SMC_RAM_END))
pm_fuse_table_offset 1875 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		if (vegam_populate_dw8(hwmgr, pm_fuse_table_offset))
pm_fuse_table_offset 1901 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,
pm_fuse_table_offset  482 drivers/gpu/drm/radeon/ci_dpm.c 	u32 pm_fuse_table_offset;
pm_fuse_table_offset  489 drivers/gpu/drm/radeon/ci_dpm.c 					     &pm_fuse_table_offset, pi->sram_end);
pm_fuse_table_offset  516 drivers/gpu/drm/radeon/ci_dpm.c 		ret = ci_copy_bytes_to_smc(rdev, pm_fuse_table_offset,