pm_ctrl 501 arch/arm/mach-omap2/prcm-common.h u16 pm_ctrl; pm_ctrl 48 arch/arm/mach-omap2/prm44xx.c .pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET, pm_ctrl 61 arch/arm/mach-omap2/prm44xx.c unsigned long pm_ctrl; pm_ctrl 317 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); pm_ctrl 320 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl) & pm_ctrl 330 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); pm_ctrl 333 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl) & pm_ctrl 361 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); pm_ctrl 754 arch/arm/mach-omap2/prm44xx.c omap_prm_context.pm_ctrl = pm_ctrl 756 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); pm_ctrl 765 arch/arm/mach-omap2/prm44xx.c omap4_prm_write_inst_reg(omap_prm_context.pm_ctrl, pm_ctrl 767 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl); pm_ctrl 823 arch/arm/mach-omap2/prm44xx.c omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET; pm_ctrl 83 arch/powerpc/platforms/cell/pmu.c u32 pm_ctrl; pm_ctrl 92 arch/powerpc/platforms/cell/pmu.c pm_ctrl = cbe_read_pm(cpu, pm_control); pm_ctrl 93 arch/powerpc/platforms/cell/pmu.c if (pm_ctrl & CBE_PM_ENABLE_PERF_MON) { pm_ctrl 98 arch/powerpc/platforms/cell/pmu.c cbe_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 260 arch/powerpc/platforms/cell/pmu.c u32 pm_ctrl, size = 0; pm_ctrl 263 arch/powerpc/platforms/cell/pmu.c pm_ctrl = cbe_read_pm(cpu, pm_control); pm_ctrl 264 arch/powerpc/platforms/cell/pmu.c size = (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; pm_ctrl 273 arch/powerpc/platforms/cell/pmu.c u32 pm_ctrl; pm_ctrl 276 arch/powerpc/platforms/cell/pmu.c pm_ctrl = cbe_read_pm(cpu, pm_control); pm_ctrl 279 arch/powerpc/platforms/cell/pmu.c pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); pm_ctrl 283 arch/powerpc/platforms/cell/pmu.c pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr); pm_ctrl 286 arch/powerpc/platforms/cell/pmu.c cbe_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 299 arch/powerpc/platforms/cell/pmu.c u32 pm_ctrl; pm_ctrl 304 arch/powerpc/platforms/cell/pmu.c pm_ctrl = cbe_read_pm(cpu, pm_control) | CBE_PM_ENABLE_PERF_MON; pm_ctrl 305 arch/powerpc/platforms/cell/pmu.c cbe_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 311 arch/powerpc/platforms/cell/pmu.c u32 pm_ctrl; pm_ctrl 312 arch/powerpc/platforms/cell/pmu.c pm_ctrl = cbe_read_pm(cpu, pm_control) & ~CBE_PM_ENABLE_PERF_MON; pm_ctrl 313 arch/powerpc/platforms/cell/pmu.c cbe_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 511 drivers/ps3/ps3-lpm.c u32 pm_ctrl; pm_ctrl 519 drivers/ps3/ps3-lpm.c pm_ctrl = ps3_read_pm(cpu, pm_control); pm_ctrl 520 drivers/ps3/ps3-lpm.c return (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; pm_ctrl 530 drivers/ps3/ps3-lpm.c u32 pm_ctrl; pm_ctrl 538 drivers/ps3/ps3-lpm.c pm_ctrl = ps3_read_pm(cpu, pm_control); pm_ctrl 542 drivers/ps3/ps3-lpm.c pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); pm_ctrl 543 drivers/ps3/ps3-lpm.c ps3_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 547 drivers/ps3/ps3-lpm.c pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr); pm_ctrl 548 drivers/ps3/ps3-lpm.c ps3_write_pm(cpu, pm_control, pm_ctrl); pm_ctrl 216 drivers/staging/media/ipu3/ipu3-css.c u32 pm_ctrl, state, val; pm_ctrl 238 drivers/staging/media/ipu3/ipu3-css.c pm_ctrl = readl(base + IMGU_REG_PM_CTRL); pm_ctrl 242 drivers/staging/media/ipu3/ipu3-css.c pm_ctrl, state, state & IMGU_STATE_POWER_DOWN ? "down" : "up"); pm_ctrl 262 drivers/staging/media/ipu3/ipu3-css.c pm_ctrl = readl(base + IMGU_REG_PM_CTRL); pm_ctrl 263 drivers/staging/media/ipu3/ipu3-css.c val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); pm_ctrl 293 drivers/staging/media/ipu3/ipu3-css.c val |= pm_ctrl & (IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF);