pm_config          33 arch/arm/mach-davinci/pm.c static struct davinci_pm_config pm_config = {
pm_config          48 arch/arm/mach-davinci/pm.c 	if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
pm_config          51 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          53 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config          58 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          60 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config          64 arch/arm/mach-davinci/pm.c 	val = __raw_readl(pm_config.deepsleep_reg);
pm_config          66 arch/arm/mach-davinci/pm.c 	val |= pm_config.sleepcount;
pm_config          67 arch/arm/mach-davinci/pm.c 	__raw_writel(val, pm_config.deepsleep_reg);
pm_config          70 arch/arm/mach-davinci/pm.c 	davinci_sram_suspend(&pm_config);
pm_config          72 arch/arm/mach-davinci/pm.c 	if (pm_config.cpupll_reg_base != pm_config.ddrpll_reg_base) {
pm_config          75 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          77 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config          80 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          82 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config          88 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          90 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config          96 arch/arm/mach-davinci/pm.c 		val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL);
pm_config          99 arch/arm/mach-davinci/pm.c 		__raw_writel(val, pm_config.cpupll_reg_base + PLLCTL);
pm_config         131 arch/arm/mach-davinci/pm.c 	pm_config.ddr2_ctlr_base = da8xx_get_mem_ctlr();
pm_config         132 arch/arm/mach-davinci/pm.c 	pm_config.deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
pm_config         134 arch/arm/mach-davinci/pm.c 	pm_config.cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
pm_config         135 arch/arm/mach-davinci/pm.c 	if (!pm_config.cpupll_reg_base)
pm_config         138 arch/arm/mach-davinci/pm.c 	pm_config.ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
pm_config         139 arch/arm/mach-davinci/pm.c 	if (!pm_config.ddrpll_reg_base) {
pm_config         144 arch/arm/mach-davinci/pm.c 	pm_config.ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
pm_config         145 arch/arm/mach-davinci/pm.c 	if (!pm_config.ddrpsc_reg_base) {
pm_config         165 arch/arm/mach-davinci/pm.c 	iounmap(pm_config.ddrpsc_reg_base);
pm_config         167 arch/arm/mach-davinci/pm.c 	iounmap(pm_config.ddrpll_reg_base);
pm_config         169 arch/arm/mach-davinci/pm.c 	iounmap(pm_config.cpupll_reg_base);
pm_config         181 drivers/input/rmi4/rmi_f34.h 	u16 pm_config;
pm_config         400 drivers/input/rmi4/rmi_f34v7.c 			blkcount->pm_config = partition_length;
pm_config         403 drivers/input/rmi4/rmi_f34v7.c 				__func__, blkcount->pm_config);
pm_config         293 drivers/net/ethernet/silan/sc92031.c 	u32			pm_config;
pm_config         640 drivers/net/ethernet/silan/sc92031.c 	iowrite32(priv->pm_config, port_base + PMConfig);
pm_config        1016 drivers/net/ethernet/silan/sc92031.c 	priv->pm_config = 0;
pm_config        1258 drivers/net/ethernet/silan/sc92031.c 	u32 pm_config;
pm_config        1261 drivers/net/ethernet/silan/sc92031.c 	pm_config = ioread32(port_base + PMConfig);
pm_config        1269 drivers/net/ethernet/silan/sc92031.c 	if (pm_config & PM_LinkUp)
pm_config        1272 drivers/net/ethernet/silan/sc92031.c 	if (pm_config & PM_Magic)
pm_config        1275 drivers/net/ethernet/silan/sc92031.c 	if (pm_config & PM_WakeUp)
pm_config        1285 drivers/net/ethernet/silan/sc92031.c 	u32 pm_config;
pm_config        1289 drivers/net/ethernet/silan/sc92031.c 	pm_config = ioread32(port_base + PMConfig)
pm_config        1293 drivers/net/ethernet/silan/sc92031.c 		pm_config |= PM_LinkUp;
pm_config        1296 drivers/net/ethernet/silan/sc92031.c 		pm_config |= PM_Magic;
pm_config        1300 drivers/net/ethernet/silan/sc92031.c 		pm_config |= PM_WakeUp;
pm_config        1302 drivers/net/ethernet/silan/sc92031.c 	priv->pm_config = pm_config;
pm_config        1303 drivers/net/ethernet/silan/sc92031.c 	iowrite32(pm_config, port_base + PMConfig);
pm_config         245 drivers/net/wireless/ti/wl12xx/main.c 	.pm_config = {
pm_config         386 drivers/net/wireless/ti/wl18xx/main.c 	.pm_config = {
pm_config        1126 drivers/net/wireless/ti/wlcore/acx.c 	struct  conf_pm_config_settings *c = &wl->conf.pm_config;
pm_config        1136 drivers/net/wireless/ti/wlcore/conf.h 	struct conf_pm_config_settings pm_config;