pm_base            96 arch/arm/mach-cns3xxx/core.c 	u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT);
pm_base           101 arch/arm/mach-cns3xxx/core.c 	clkctrl = readl(pm_base + PM_SYS_CLK_CTRL_OFFSET);
pm_base           104 arch/arm/mach-cns3xxx/core.c 	writel(clkctrl, pm_base + PM_SYS_CLK_CTRL_OFFSET);
pm_base            92 drivers/gpio/gpio-ich.c 	struct resource *pm_base;	/* Power Mangagment IO base */
pm_base           206 drivers/gpio/gpio-ich.c 		if (!ichx_priv.pm_base)
pm_base           212 drivers/gpio/gpio-ich.c 		ICHX_WRITE(BIT(16 + nr), 0, ichx_priv.pm_base);
pm_base           213 drivers/gpio/gpio-ich.c 		data = ICHX_READ(0, ichx_priv.pm_base);
pm_base           455 drivers/gpio/gpio-ich.c 	ichx_priv.pm_base = res_pm;