plltype           163 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_hw_get_pllvals(struct drm_device *dev, enum nvbios_pll_type plltype,
plltype           173 drivers/gpu/drm/nouveau/dispnv04/hw.c 	ret = nvbios_pll_parse(bios, plltype, &pll_lim);
plltype           214 drivers/gpu/drm/nouveau/dispnv04/hw.c nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
plltype           222 drivers/gpu/drm/nouveau/dispnv04/hw.c 	if (plltype == PLL_MEMORY &&
plltype           233 drivers/gpu/drm/nouveau/dispnv04/hw.c 	if (plltype == PLL_MEMORY &&
plltype           242 drivers/gpu/drm/nouveau/dispnv04/hw.c 	ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals);
plltype            43 drivers/gpu/drm/nouveau/dispnv04/hw.h int nouveau_hw_get_pllvals(struct drm_device *, enum nvbios_pll_type plltype,
plltype            46 drivers/gpu/drm/nouveau/dispnv04/hw.h int nouveau_hw_get_clock(struct drm_device *, enum nvbios_pll_type plltype);
plltype           392 drivers/ssb/driver_chipcommon.c                              u32 *plltype, u32 *n, u32 *m)
plltype           395 drivers/ssb/driver_chipcommon.c 	*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
plltype           396 drivers/ssb/driver_chipcommon.c 	switch (*plltype) {
plltype           415 drivers/ssb/driver_chipcommon.c 				 u32 *plltype, u32 *n, u32 *m)
plltype           418 drivers/ssb/driver_chipcommon.c 	*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
plltype           419 drivers/ssb/driver_chipcommon.c 	switch (*plltype) {
plltype           606 drivers/ssb/driver_chipcommon.c 	u32 plltype;
plltype           612 drivers/ssb/driver_chipcommon.c 	plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
plltype           615 drivers/ssb/driver_chipcommon.c 	if (plltype == SSB_PLLTYPE_1) {
plltype           617 drivers/ssb/driver_chipcommon.c 		baud_base = ssb_calc_clock_rate(plltype,
plltype           842 drivers/ssb/main.c u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
plltype           849 drivers/ssb/main.c 	switch (plltype) {
plltype           873 drivers/ssb/main.c 	switch (plltype) {
plltype           889 drivers/ssb/main.c 	switch (plltype) {
plltype           895 drivers/ssb/main.c 		if ((plltype == SSB_PLLTYPE_1) ||
plltype           896 drivers/ssb/main.c 		    (plltype == SSB_PLLTYPE_3))
plltype           940 drivers/ssb/main.c 	u32 plltype;
plltype           947 drivers/ssb/main.c 		ssb_extif_get_clockcontrol(&bus->extif, &plltype,
plltype           950 drivers/ssb/main.c 		ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
plltype           958 drivers/ssb/main.c 		rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
plltype           959 drivers/ssb/main.c 		if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
plltype           160 drivers/ssb/ssb_private.h extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m);
plltype           621 include/linux/ssb/ssb_driver_chipcommon.h                                     u32 *plltype, u32 *n, u32 *m);
plltype           623 include/linux/ssb/ssb_driver_chipcommon.h 					u32 *plltype, u32 *n, u32 *m);
plltype           172 include/linux/ssb/ssb_driver_extif.h 			               u32 *plltype, u32 *n, u32 *m);
plltype           205 include/linux/ssb/ssb_driver_extif.h 			        u32 *plltype, u32 *n, u32 *m)