pllclk             31 arch/mips/pic32/pic32mzda/early_clk.c 	u32 pllclk;
pllclk             54 arch/mips/pic32/pic32mzda/early_clk.c 	pllclk = plliclk ? FRC_CLK : PIC32_POSC_FREQ;
pllclk             72 arch/mips/pic32/pic32mzda/early_clk.c 		osc_freq = ((pllclk / pllidiv) * pllmult) / pllodiv;
pllclk             60 drivers/clk/clk-xgene.c 	struct xgene_clk_pll *pllclk = to_xgene_clk_pll(hw);
pllclk             63 drivers/clk/clk-xgene.c 	data = xgene_clk_read(pllclk->reg + pllclk->pll_offset);
pllclk             73 drivers/clk/clk-xgene.c 	struct xgene_clk_pll *pllclk = to_xgene_clk_pll(hw);
pllclk             81 drivers/clk/clk-xgene.c 	pll = xgene_clk_read(pllclk->reg + pllclk->pll_offset);
pllclk             83 drivers/clk/clk-xgene.c 	if (pllclk->version <= 1) {
pllclk             84 drivers/clk/clk-xgene.c 		if (pllclk->type == PLL_TYPE_PCP) {
pllclk            113 drivers/clk/clk-xgene.c 		 pllclk->version);