pll_set            40 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c 	return init->func->pll_set(init, type, khz);
pll_set            59 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c 	.pll_set = nv50_devinit_pll_set,
pll_set            58 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c 	.pll_set = nv50_devinit_pll_set,
pll_set           112 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c 	.pll_set = gf100_devinit_pll_set,
pll_set            52 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c 	.pll_set = gf100_devinit_pll_set,
pll_set           177 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c 	.pll_set = gf100_devinit_pll_set,
pll_set           144 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c 	.pll_set = gt215_devinit_pll_set,
pll_set            70 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.c 	.pll_set = gv100_devinit_pll_set,
pll_set            59 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c 	.pll_set = gt215_devinit_pll_set,
pll_set           458 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c 	.pll_set = nv04_devinit_pll_set,
pll_set           135 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c 	.pll_set = nv04_devinit_pll_set,
pll_set           105 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.c 	.pll_set = nv04_devinit_pll_set,
pll_set            34 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.c 	.pll_set = nv04_devinit_pll_set,
pll_set            71 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.c 	.pll_set = nv04_devinit_pll_set,
pll_set           170 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c 	.pll_set = nv50_devinit_pll_set,
pll_set            14 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h 	int  (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
pll_set            80 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.c 	.pll_set = tu102_devinit_pll_set,