pll_pre_div1p      61 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	u32 pll_pre_div1p;
pll_pre_div1p     190 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			phy->pll_pre_div1p = 1;
pll_pre_div1p     193 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 			phy->pll_pre_div1p = 0;
pll_pre_div1p     416 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 	val = (phy->pll_pre_div1p << 7) + phy->pll_pre_p;