pll_post_divider  363 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		dividers->pll_post_divider = pll_parameters.ucPostDiv;
pll_post_divider  387 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		dividers->pll_post_divider =
pll_post_divider  457 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c 		dividers->pll_post_divider =
pll_post_divider   48 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint32_t pll_post_divider;
pll_post_divider   68 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint32_t pll_post_divider;
pll_post_divider   79 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint32_t    pll_post_divider;
pll_post_divider   85 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint32_t    pll_post_divider;               /* post divider value */
pll_post_divider   95 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h 	uint32_t    pll_post_divider;               /* post divider value */
pll_post_divider  487 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
pll_post_divider  504 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
pll_post_divider  518 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
pll_post_divider  530 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
pll_post_divider  544 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c 			(uint8_t)dividers.pll_post_divider;
pll_post_divider  364 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1409 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1541 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1548 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1581 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1611 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider  933 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1343 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1453 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1489 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1588 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1595 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider  868 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1457 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1328 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1432 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1439 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1993 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			table->Ulv.BifSclkDfs = PP_HOST_TO_SMC_US((USHORT)(dividers.pll_post_divider));
pll_post_divider 1995 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			table->LinkLevel[i-1].BifSclkDfs = PP_HOST_TO_SMC_US((USHORT)(dividers.pll_post_divider));
pll_post_divider  611 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	sclk->SclkDid              = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1206 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1348 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1357 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					(uint8_t)dividers.pll_post_divider;
pll_post_divider 1405 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1449 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1245 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->VceLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1356 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 1363 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;
pll_post_divider 2118 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					PP_HOST_TO_SMC_US((uint16_t)(dividers.pll_post_divider));
pll_post_divider 2121 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 					PP_HOST_TO_SMC_US((uint16_t)(dividers.pll_post_divider));