pll_cmp           157 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c static inline u64 pll_cmp_to_fdata(u32 pll_cmp, unsigned long ref_clk)
pll_cmp           159 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u64 fdata = ((u64)pll_cmp) * ref_clk * 10;
pll_cmp           233 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u32 pll_cmp;
pll_cmp           268 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	pll_cmp = pll_get_pll_cmp(fdata, ref_clk);
pll_cmp           282 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	DBG("PLL_CMP: %u", pll_cmp);
pll_cmp           300 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cfg->com_lock_cmp1_mode0 = (pll_cmp & 0xff);
pll_cmp           301 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cfg->com_lock_cmp2_mode0 = ((pll_cmp & 0xff00) >> 8);
pll_cmp           302 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cfg->com_lock_cmp3_mode0 = ((pll_cmp & 0x30000) >> 16);
pll_cmp           649 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u32 cmp1, cmp2, cmp3, pll_cmp;
pll_cmp           655 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	pll_cmp = cmp1 | (cmp2 << 8) | (cmp3 << 16);
pll_cmp           657 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	fdata = pll_cmp_to_fdata(pll_cmp + 1, parent_rate);