pll_cfg2_init     200 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	u32 pll_cfg2_init;
pll_cfg2_init     219 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 	pll_cfg2_init = SUN8I_HDMI_PHY_PLL_CFG2_SV_H |
pll_cfg2_init     260 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		pll_cfg2_init |= SUN8I_HDMI_PHY_PLL_CFG2_VCO_S(4) |
pll_cfg2_init     270 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		pll_cfg2_init |= SUN8I_HDMI_PHY_PLL_CFG2_VCO_S(4) |
pll_cfg2_init     280 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		pll_cfg2_init |= SUN8I_HDMI_PHY_PLL_CFG2_VCO_S(4) |
pll_cfg2_init     290 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 		pll_cfg2_init |= SUN8I_HDMI_PHY_PLL_CFG2_VCO_S(6) |
pll_cfg2_init     312 drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c 			   pll_cfg2_init);