pll_cfg           118 drivers/clk/axs10x/i2s_pll_clock.c 	const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate);
pll_cfg           121 drivers/clk/axs10x/i2s_pll_clock.c 	if (!pll_cfg) {
pll_cfg           126 drivers/clk/axs10x/i2s_pll_clock.c 	for (i = 0; pll_cfg[i].rate != 0; i++)
pll_cfg           127 drivers/clk/axs10x/i2s_pll_clock.c 		if (pll_cfg[i].rate == rate)
pll_cfg           137 drivers/clk/axs10x/i2s_pll_clock.c 	const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(parent_rate);
pll_cfg           140 drivers/clk/axs10x/i2s_pll_clock.c 	if (!pll_cfg) {
pll_cfg           145 drivers/clk/axs10x/i2s_pll_clock.c 	for (i = 0; pll_cfg[i].rate != 0; i++) {
pll_cfg           146 drivers/clk/axs10x/i2s_pll_clock.c 		if (pll_cfg[i].rate == rate) {
pll_cfg           147 drivers/clk/axs10x/i2s_pll_clock.c 			i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv);
pll_cfg           148 drivers/clk/axs10x/i2s_pll_clock.c 			i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv);
pll_cfg           149 drivers/clk/axs10x/i2s_pll_clock.c 			i2s_pll_write(clk, PLL_ODIV0_REG, pll_cfg[i].odiv0);
pll_cfg           150 drivers/clk/axs10x/i2s_pll_clock.c 			i2s_pll_write(clk, PLL_ODIV1_REG, pll_cfg[i].odiv1);
pll_cfg            98 drivers/clk/axs10x/pll_clock.c 	const struct axs10x_pll_cfg *pll_cfg;
pll_cfg           162 drivers/clk/axs10x/pll_clock.c 	const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg;
pll_cfg           164 drivers/clk/axs10x/pll_clock.c 	if (pll_cfg[0].rate == 0)
pll_cfg           167 drivers/clk/axs10x/pll_clock.c 	best_rate = pll_cfg[0].rate;
pll_cfg           169 drivers/clk/axs10x/pll_clock.c 	for (i = 1; pll_cfg[i].rate != 0; i++) {
pll_cfg           170 drivers/clk/axs10x/pll_clock.c 		if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate))
pll_cfg           171 drivers/clk/axs10x/pll_clock.c 			best_rate = pll_cfg[i].rate;
pll_cfg           182 drivers/clk/axs10x/pll_clock.c 	const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg;
pll_cfg           184 drivers/clk/axs10x/pll_clock.c 	for (i = 0; pll_cfg[i].rate != 0; i++) {
pll_cfg           185 drivers/clk/axs10x/pll_clock.c 		if (pll_cfg[i].rate == rate) {
pll_cfg           187 drivers/clk/axs10x/pll_clock.c 					 axs10x_encode_div(pll_cfg[i].idiv, 0));
pll_cfg           189 drivers/clk/axs10x/pll_clock.c 					 axs10x_encode_div(pll_cfg[i].fbdiv, 0));
pll_cfg           191 drivers/clk/axs10x/pll_clock.c 					 axs10x_encode_div(pll_cfg[i].odiv, 1));
pll_cfg           249 drivers/clk/axs10x/pll_clock.c 	pll_clk->pll_cfg = of_device_get_match_data(dev);
pll_cfg           251 drivers/clk/axs10x/pll_clock.c 	if (!pll_clk->pll_cfg) {
pll_cfg           301 drivers/clk/axs10x/pll_clock.c 	pll_clk->pll_cfg = arc_pll_cfg;
pll_cfg            97 drivers/clk/clk-hsdk-pll.c 	const struct hsdk_pll_cfg *pll_cfg;
pll_cfg           108 drivers/clk/clk-hsdk-pll.c 	.pll_cfg = asdt_pll_cfg,
pll_cfg           113 drivers/clk/clk-hsdk-pll.c 	.pll_cfg = asdt_pll_cfg,
pll_cfg           118 drivers/clk/clk-hsdk-pll.c 	.pll_cfg = hdmi_pll_cfg,
pll_cfg           202 drivers/clk/clk-hsdk-pll.c 	const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;
pll_cfg           204 drivers/clk/clk-hsdk-pll.c 	if (pll_cfg[0].rate == 0)
pll_cfg           207 drivers/clk/clk-hsdk-pll.c 	best_rate = pll_cfg[0].rate;
pll_cfg           209 drivers/clk/clk-hsdk-pll.c 	for (i = 1; pll_cfg[i].rate != 0; i++) {
pll_cfg           210 drivers/clk/clk-hsdk-pll.c 		if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate))
pll_cfg           211 drivers/clk/clk-hsdk-pll.c 			best_rate = pll_cfg[i].rate;
pll_cfg           278 drivers/clk/clk-hsdk-pll.c 	const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;
pll_cfg           280 drivers/clk/clk-hsdk-pll.c 	for (i = 0; pll_cfg[i].rate != 0; i++) {
pll_cfg           281 drivers/clk/clk-hsdk-pll.c 		if (pll_cfg[i].rate == rate) {
pll_cfg           283 drivers/clk/clk-hsdk-pll.c 							     &pll_cfg[i]);
pll_cfg           430 drivers/net/ethernet/sun/niu.c 	u16 pll_cfg, pll_sts;
pll_cfg           457 drivers/net/ethernet/sun/niu.c 	pll_cfg = (PLL_CFG_ENPLL | PLL_CFG_MPY_8X);
pll_cfg           460 drivers/net/ethernet/sun/niu.c 			 ESR2_TI_PLL_CFG_L, pll_cfg);
pll_cfg           527 drivers/net/ethernet/sun/niu.c 	u32 tx_cfg, rx_cfg, pll_cfg, pll_sts;
pll_cfg           549 drivers/net/ethernet/sun/niu.c 	pll_cfg = (PLL_CFG_ENPLL | PLL_CFG_MPY_10X);
pll_cfg           552 drivers/net/ethernet/sun/niu.c 			 ESR2_TI_PLL_CFG_L, pll_cfg & 0xffff);
pll_cfg           910 drivers/net/ethernet/sun/niu.c 	unsigned long ctrl_reg, test_cfg_reg, pll_cfg, i;
pll_cfg           923 drivers/net/ethernet/sun/niu.c 		pll_cfg = ENET_SERDES_0_PLL_CFG;
pll_cfg           929 drivers/net/ethernet/sun/niu.c 		pll_cfg = ENET_SERDES_1_PLL_CFG;
pll_cfg           964 drivers/net/ethernet/sun/niu.c 	nw64(pll_cfg, val);
pll_cfg          2353 drivers/net/ethernet/sun/niu.c 	unsigned long ctrl_reg, test_cfg_reg, pll_cfg, i;
pll_cfg          2360 drivers/net/ethernet/sun/niu.c 		pll_cfg = ENET_SERDES_0_PLL_CFG;
pll_cfg          2365 drivers/net/ethernet/sun/niu.c 		pll_cfg = ENET_SERDES_1_PLL_CFG;
pll_cfg          2397 drivers/net/ethernet/sun/niu.c 	nw64(pll_cfg, ENET_SERDES_PLL_FBDIV2);
pll_cfg            41 drivers/net/wireless/intel/iwlwifi/cfg/1000.c 	.pll_cfg = true,
pll_cfg            42 drivers/net/wireless/intel/iwlwifi/cfg/5000.c 	.pll_cfg = true,
pll_cfg           185 drivers/net/wireless/intel/iwlwifi/iwl-config.h 	u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
pll_cfg           368 drivers/net/wireless/intel/iwlwifi/pcie/trans.c 	if (trans->trans_cfg->base_params->pll_cfg)