pll_a             210 drivers/gpu/drm/i915/display/dvo_ns2501.c 	u8 pll_a;		/* PLL configuration, register A, 1B */
pll_a             237 drivers/gpu/drm/i915/display/dvo_ns2501.c 		.pll_a	= 17,
pll_a             257 drivers/gpu/drm/i915/display/dvo_ns2501.c 		.pll_a	= 25,
pll_a             276 drivers/gpu/drm/i915/display/dvo_ns2501.c 		.pll_a	= 11,
pll_a             614 drivers/gpu/drm/i915/display/dvo_ns2501.c 	ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a);