pll5_bypass_sels   87 drivers/clk/imx/clk-imx6q.c static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  496 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
pll5_bypass_sels   66 drivers/clk/imx/clk-imx6sl.c static const char *pll5_bypass_sels[]	= { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  234 drivers/clk/imx/clk-imx6sl.c 	hws[IMX6SL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
pll5_bypass_sels   27 drivers/clk/imx/clk-imx6sll.c static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  151 drivers/clk/imx/clk-imx6sll.c 	hws[IMX6SLL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
pll5_bypass_sels   80 drivers/clk/imx/clk-imx6sx.c static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  179 drivers/clk/imx/clk-imx6sx.c 	hws[IMX6SX_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
pll5_bypass_sels   25 drivers/clk/imx/clk-imx6ul.c static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  161 drivers/clk/imx/clk-imx6ul.c 	hws[IMX6UL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
pll5_bypass_sels   80 drivers/clk/imx/clk-vf610.c static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
pll5_bypass_sels  230 drivers/clk/imx/clk-vf610.c 	clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);