pll4_bypass_sels 86 drivers/clk/imx/clk-imx6q.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 495 drivers/clk/imx/clk-imx6q.c hws[IMX6QDL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); pll4_bypass_sels 65 drivers/clk/imx/clk-imx6sl.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 233 drivers/clk/imx/clk-imx6sl.c hws[IMX6SL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); pll4_bypass_sels 26 drivers/clk/imx/clk-imx6sll.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 150 drivers/clk/imx/clk-imx6sll.c hws[IMX6SLL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); pll4_bypass_sels 79 drivers/clk/imx/clk-imx6sx.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 178 drivers/clk/imx/clk-imx6sx.c hws[IMX6SX_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); pll4_bypass_sels 24 drivers/clk/imx/clk-imx6ul.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 160 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_PLL4_BYPASS] = imx_clk_hw_mux_flags("pll4_bypass", base + 0x70, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT); pll4_bypass_sels 79 drivers/clk/imx/clk-vf610.c static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", }; pll4_bypass_sels 229 drivers/clk/imx/clk-vf610.c clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT);