pll3_bypass_sels   85 drivers/clk/imx/clk-imx6q.c static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  494 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
pll3_bypass_sels   64 drivers/clk/imx/clk-imx6sl.c static const char *pll3_bypass_sels[]	= { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  232 drivers/clk/imx/clk-imx6sl.c 	hws[IMX6SL_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
pll3_bypass_sels   25 drivers/clk/imx/clk-imx6sll.c static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  149 drivers/clk/imx/clk-imx6sll.c 	hws[IMX6SLL_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
pll3_bypass_sels   78 drivers/clk/imx/clk-imx6sx.c static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  177 drivers/clk/imx/clk-imx6sx.c 	hws[IMX6SX_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
pll3_bypass_sels   23 drivers/clk/imx/clk-imx6ul.c static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  159 drivers/clk/imx/clk-imx6ul.c 	hws[IMX6UL_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", base + 0x10, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
pll3_bypass_sels   78 drivers/clk/imx/clk-vf610.c static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
pll3_bypass_sels  228 drivers/clk/imx/clk-vf610.c 	clk[VF610_PLL3_BYPASS] = imx_clk_mux_flags("pll3_bypass", PLL3_CTRL, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);