pll1_bypass_sels   83 drivers/clk/imx/clk-imx6q.c static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  492 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
pll1_bypass_sels   62 drivers/clk/imx/clk-imx6sl.c static const char *pll1_bypass_sels[]	= { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  230 drivers/clk/imx/clk-imx6sl.c 	hws[IMX6SL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
pll1_bypass_sels   23 drivers/clk/imx/clk-imx6sll.c static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  147 drivers/clk/imx/clk-imx6sll.c 	hws[IMX6SLL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
pll1_bypass_sels   76 drivers/clk/imx/clk-imx6sx.c static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  175 drivers/clk/imx/clk-imx6sx.c 	hws[IMX6SX_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
pll1_bypass_sels   21 drivers/clk/imx/clk-imx6ul.c static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  157 drivers/clk/imx/clk-imx6ul.c 	hws[IMX6UL_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", base + 0x00, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
pll1_bypass_sels   76 drivers/clk/imx/clk-vf610.c static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
pll1_bypass_sels  226 drivers/clk/imx/clk-vf610.c 	clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);