plane_ddb_uv      251 drivers/gpu/drm/i915/display/intel_atomic_plane.c 		    skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
plane_ddb_uv      258 drivers/gpu/drm/i915/display/intel_atomic_plane.c 		entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id];
plane_ddb_uv      312 drivers/gpu/drm/i915/display/intel_atomic_plane.c 	memcpy(entries_uv, old_crtc_state->wm.skl.plane_ddb_uv,
plane_ddb_uv      313 drivers/gpu/drm/i915/display/intel_atomic_plane.c 	       sizeof(old_crtc_state->wm.skl.plane_ddb_uv));
plane_ddb_uv      704 drivers/gpu/drm/i915/display/intel_display_types.h 			struct skl_ddb_entry plane_ddb_uv[I915_MAX_PLANES];
plane_ddb_uv     4355 drivers/gpu/drm/i915/intel_pm.c 	memset(crtc_state->wm.skl.plane_ddb_uv, 0, sizeof(crtc_state->wm.skl.plane_ddb_uv));
plane_ddb_uv     4476 drivers/gpu/drm/i915/intel_pm.c 			&crtc_state->wm.skl.plane_ddb_uv[plane_id];
plane_ddb_uv     5159 drivers/gpu/drm/i915/intel_pm.c 		&crtc_state->wm.skl.plane_ddb_uv[plane_id];
plane_ddb_uv     5294 drivers/gpu/drm/i915/intel_pm.c 		    skl_ddb_entry_equal(&old_crtc_state->wm.skl.plane_ddb_uv[plane_id],
plane_ddb_uv     5295 drivers/gpu/drm/i915/intel_pm.c 					&new_crtc_state->wm.skl.plane_ddb_uv[plane_id]))