pl1 4185 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c static inline bool smu7_are_power_levels_equal(const struct smu7_performance_level *pl1, pl1 4188 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c return ((pl1->memory_clock == pl2->memory_clock) && pl1 4189 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (pl1->engine_clock == pl2->engine_clock) && pl1 4190 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (pl1->pcie_gen == pl2->pcie_gen) && pl1 4191 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c (pl1->pcie_lane == pl2->pcie_lane)); pl1 4635 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c const struct vega10_performance_level *pl1, pl1 4638 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c return ((pl1->soc_clock == pl2->soc_clock) && pl1 4639 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (pl1->gfx_clock == pl2->gfx_clock) && pl1 4640 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c (pl1->mem_clock == pl2->mem_clock)); pl1 1510 drivers/pinctrl/tegra/pinctrl-tegra210.c PINGROUP(pl1, SOC, RSVD1, RSVD2, RSVD3, 0x3278, Y, Y, N, -1, -1, -1, -1, -1, -1, -1, -1, -1), pl1 1533 drivers/pinctrl/tegra/pinctrl-tegra210.c DRV_PINGROUP(pl1, 0x9f8, 0x0, -1, -1, -1, -1, 28, 2, 30, 2),