pixel_chunk_size_in_kbyte 215 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency))); pixel_chunk_size_in_kbyte 217 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); pixel_chunk_size_in_kbyte 219 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); pixel_chunk_size_in_kbyte 223 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], v->return_bw_todcn_per_state * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bw_todcn_per_state - v->dcfclk_per_state[i] * v->return_bus_width / 4.0) + v->urgent_latency))); pixel_chunk_size_in_kbyte 225 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_point = 2.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); pixel_chunk_size_in_kbyte 227 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw_per_state[i] =dcn_bw_min2(v->return_bw_per_state[i], dcn_bw_pow(4.0 * v->return_bw_todcn_per_state * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk_per_state[i] * v->urgent_latency / (v->return_bw_todcn_per_state * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); pixel_chunk_size_in_kbyte 253 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / v->return_bw_per_state[i] > v->urgent_round_trip_and_out_of_order_latency_per_state[i]) { pixel_chunk_size_in_kbyte 790 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->extra_latency = v->urgent_round_trip_and_out_of_order_latency_per_state[i] + (v->total_number_of_active_dpp[i][j] * v->pixel_chunk_size_in_kbyte + v->total_number_of_dcc_active_dpp[i][j] * v->meta_chunk_size) * 1024.0 / v->return_bw_per_state[i]; pixel_chunk_size_in_kbyte 1235 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency))); pixel_chunk_size_in_kbyte 1237 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); pixel_chunk_size_in_kbyte 1239 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); pixel_chunk_size_in_kbyte 1243 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, v->return_bandwidth_to_dcn * 4.0 * (1.0 - v->urgent_latency / ((v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 / (v->return_bandwidth_to_dcn - v->dcfclk * v->return_bus_width / 4.0) + v->urgent_latency))); pixel_chunk_size_in_kbyte 1245 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->critical_compression = 2.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0); pixel_chunk_size_in_kbyte 1247 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->return_bw =dcn_bw_min2(v->return_bw, dcn_bw_pow(4.0 * v->return_bandwidth_to_dcn * (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0 * v->return_bus_width * v->dcfclk * v->urgent_latency / (v->return_bandwidth_to_dcn * v->urgent_latency + (v->rob_buffer_size_in_kbyte - v->pixel_chunk_size_in_kbyte) * 1024.0), 2)); pixel_chunk_size_in_kbyte 1318 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->urgent_extra_latency = v->urgent_round_trip_and_out_of_order_latency + (v->total_active_dpp * v->pixel_chunk_size_in_kbyte + v->total_dcc_active_dpp * v->meta_chunk_size) * 1024.0 / v->return_bw; pixel_chunk_size_in_kbyte 133 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c .pixel_chunk_size_in_kbyte = 8, pixel_chunk_size_in_kbyte 793 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c v->pixel_chunk_size_in_kbyte = dc->dcn_ip->pixel_chunk_size_in_kbyte; pixel_chunk_size_in_kbyte 1673 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dcn_ip->pixel_chunk_size_in_kbyte, pixel_chunk_size_in_kbyte 1725 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dc->dml.ip.pixel_chunk_size_kbytes = dc->dcn_ip->pixel_chunk_size_in_kbyte; pixel_chunk_size_in_kbyte 141 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float pixel_chunk_size_in_kbyte; pixel_chunk_size_in_kbyte 589 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float pixel_chunk_size_in_kbyte;