pixclks_cntl 854 drivers/gpu/drm/radeon/radeon_legacy_crtc.c uint32_t pixclks_cntl = ((RREG32_PLL(RADEON_PIXCLKS_CNTL) & pixclks_cntl 861 drivers/gpu/drm/radeon/radeon_legacy_crtc.c &pixclks_cntl); pixclks_cntl 916 drivers/gpu/drm/radeon/radeon_legacy_crtc.c WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); pixclks_cntl 918 drivers/gpu/drm/radeon/radeon_legacy_crtc.c uint32_t pixclks_cntl; pixclks_cntl 922 drivers/gpu/drm/radeon/radeon_legacy_crtc.c pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); pixclks_cntl 924 drivers/gpu/drm/radeon/radeon_legacy_crtc.c &pll_fb_post_div, &pixclks_cntl); pixclks_cntl 1022 drivers/gpu/drm/radeon/radeon_legacy_crtc.c WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); pixclks_cntl 58 drivers/gpu/drm/radeon/radeon_legacy_encoders.c uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; pixclks_cntl 117 drivers/gpu/drm/radeon/radeon_legacy_encoders.c pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); pixclks_cntl 130 drivers/gpu/drm/radeon/radeon_legacy_encoders.c WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); pixclks_cntl 1537 drivers/gpu/drm/radeon/radeon_legacy_encoders.c uint32_t gpiopad_a = 0, pixclks_cntl, tmp; pixclks_cntl 1583 drivers/gpu/drm/radeon/radeon_legacy_encoders.c pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); pixclks_cntl 1600 drivers/gpu/drm/radeon/radeon_legacy_encoders.c tmp = pixclks_cntl & ~(RADEON_PIX2CLK_ALWAYS_ONb pixclks_cntl 1676 drivers/gpu/drm/radeon/radeon_legacy_encoders.c WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); pixclks_cntl 879 drivers/gpu/drm/radeon/radeon_legacy_tv.c uint32_t *ppll_div_3, uint32_t *pixclks_cntl) pixclks_cntl 893 drivers/gpu/drm/radeon/radeon_legacy_tv.c *pixclks_cntl &= ~(RADEON_PIX2CLK_SRC_SEL_MASK | RADEON_PIXCLK_TV_SRC_SEL); pixclks_cntl 894 drivers/gpu/drm/radeon/radeon_legacy_tv.c *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK; pixclks_cntl 899 drivers/gpu/drm/radeon/radeon_legacy_tv.c uint32_t *p2pll_div_0, uint32_t *pixclks_cntl) pixclks_cntl 913 drivers/gpu/drm/radeon/radeon_legacy_tv.c *pixclks_cntl &= ~RADEON_PIX2CLK_SRC_SEL_MASK; pixclks_cntl 914 drivers/gpu/drm/radeon/radeon_legacy_tv.c *pixclks_cntl |= RADEON_PIX2CLK_SRC_SEL_P2PLLCLK | RADEON_PIXCLK_TV_SRC_SEL; pixclks_cntl 962 drivers/gpu/drm/radeon/radeon_mode.h uint32_t *ppll_div_3, uint32_t *pixclks_cntl); pixclks_cntl 965 drivers/gpu/drm/radeon/radeon_mode.h uint32_t *p2pll_div_0, uint32_t *pixclks_cntl); pixclks_cntl 831 drivers/video/fbdev/aty/radeon_pm.c u32 pixclks_cntl; pixclks_cntl 899 drivers/video/fbdev/aty/radeon_pm.c pixclks_cntl = INPLL( pllPIXCLKS_CNTL); pixclks_cntl 900 drivers/video/fbdev/aty/radeon_pm.c pixclks_cntl &= ~( PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb | pixclks_cntl 908 drivers/video/fbdev/aty/radeon_pm.c OUTPLL( pllPIXCLKS_CNTL, pixclks_cntl);