pipes 421 drivers/gpu/drm/amd/display/dc/core/dc.c struct pipe_ctx *pipes = NULL; pipes 427 drivers/gpu/drm/amd/display/dc/core/dc.c pipes = &link->dc->current_state->res_ctx.pipe_ctx[i]; pipes 432 drivers/gpu/drm/amd/display/dc/core/dc.c if (!pipes) pipes 443 drivers/gpu/drm/amd/display/dc/core/dc.c if (pipes->plane_res.xfm && pipes 444 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->plane_res.xfm->funcs->transform_set_pixel_storage_depth) { pipes 445 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->plane_res.xfm->funcs->transform_set_pixel_storage_depth( pipes 446 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->plane_res.xfm, pipes 447 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->plane_res.scl_data.lb_params.depth, pipes 451 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->stream_res.opp->funcs-> pipes 452 drivers/gpu/drm/amd/display/dc/core/dc.c opp_program_bit_depth_reduction(pipes->stream_res.opp, ¶ms); pipes 459 drivers/gpu/drm/amd/display/dc/core/dc.c struct pipe_ctx *pipes; pipes 463 drivers/gpu/drm/amd/display/dc/core/dc.c pipes = &dc->current_state->res_ctx.pipe_ctx[i]; pipes 464 drivers/gpu/drm/amd/display/dc/core/dc.c dc->hwss.program_gamut_remap(pipes); pipes 476 drivers/gpu/drm/amd/display/dc/core/dc.c struct pipe_ctx *pipes; pipes 482 drivers/gpu/drm/amd/display/dc/core/dc.c pipes = &dc->current_state->res_ctx.pipe_ctx[i]; pipes 484 drivers/gpu/drm/amd/display/dc/core/dc.c pipes, pipes 487 drivers/gpu/drm/amd/display/dc/core/dc.c pipes->stream_res.opp->inst); pipes 3193 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx; pipes 3194 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c struct pipe_ctx *pipe_ctx = &pipes[0]; pipes 3204 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c if (pipes[i].stream->link == link && !pipes[i].top_pipe && !pipes[i].prev_odm_pipe) { pipes 3205 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c pipe_ctx = &pipes[i]; pipes 3251 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c pipes->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc); pipes 75 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c struct pipe_ctx *pipes = pipes 85 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (pipes[i].stream != NULL && pipes 86 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream->link == link) { pipes 87 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (pipes[i].clock_source != NULL && pipes 88 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) { pipes 89 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].clock_source = dp_cs; pipes 90 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.pix_clk_params.requested_pix_clk_100hz = pipes 91 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream->timing.pix_clk_100hz; pipes 92 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].clock_source->funcs->program_pix_clk( pipes 93 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].clock_source, pipes 94 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c &pipes[i].stream_res.pix_clk_params, pipes 95 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c &pipes[i].pll_settings); pipes 272 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c struct pipe_ctx *pipes = pipes 277 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (pipes[i].stream != NULL && pipes 278 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c !pipes[i].top_pipe && !pipes[i].prev_odm_pipe && pipes 279 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream->link != NULL && pipes 280 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.stream_enc != NULL && pipes 281 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream->link == link) { pipes 284 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.stream_enc->funcs->dp_blank( pipes 285 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.stream_enc); pipes 293 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c link->dc->hwss.disable_stream(&pipes[i]); pipes 294 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if ((&pipes[i])->stream_res.audio && !link->dc->debug.az_endpoint_mute_only) pipes 295 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c (&pipes[i])->stream_res.audio->funcs->az_disable((&pipes[i])->stream_res.audio); pipes 308 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].clock_source->id); pipes 320 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c link->dc->hwss.enable_stream(&pipes[i]); pipes 322 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c link->dc->hwss.unblank_stream(&pipes[i], pipes 325 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c if (pipes[i].stream_res.audio) { pipes 328 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.audio->funcs->az_enable( pipes 329 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.audio); pipes 334 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.stream_enc->funcs-> pipes 336 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c pipes[i].stream_res.stream_enc, false); pipes 1836 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) pipes 1847 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; pipes 1848 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.num_active_wb++; pipes 1849 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; pipes 1850 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; pipes 1851 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; pipes 1852 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; pipes 1853 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; pipes 1854 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; pipes 1855 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_htaps_chroma = wb_info->dwb_params.scaler_taps.h_taps_c; pipes 1856 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_vtaps_chroma = wb_info->dwb_params.scaler_taps.v_taps_c; pipes 1857 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_hratio = 1.0; pipes 1858 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_vratio = 1.0; pipes 1861 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_pixel_format = dm_420_8; pipes 1863 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_pixel_format = dm_420_10; pipes 1865 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.wb.wb_pixel_format = dm_444_32; pipes 1873 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) pipes 1906 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.dsc_enable = res_ctx->pipe_ctx[i].stream->timing.flags.DSC; pipes 1908 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; pipes 1911 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dynamic_metadata_enable = true; pipes 1913 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dynamic_metadata_lines_before_active = pipes 1917 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dynamic_metadata_xmit_bytes = pipes 1920 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dcc = false; pipes 1921 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dcc_rate = 1; pipes 1922 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.synchronized_vblank_all_planes = synchronized_vblank; pipes 1923 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.hblank_start = timing->h_total - timing->h_front_porch; pipes 1924 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.hblank_end = pipes[pipe_cnt].pipe.dest.hblank_start pipes 1928 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vblank_start = timing->v_total - timing->v_front_porch; pipes 1929 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start pipes 1933 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.htotal = timing->h_total; pipes 1934 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; pipes 1935 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.hactive = timing->h_addressable; pipes 1936 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vactive = timing->v_addressable; pipes 1937 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.interlaced = timing->flags.INTERLACE; pipes 1938 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.pixel_rate_mhz = timing->pix_clk_100hz/10000.0; pipes 1940 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.pixel_rate_mhz *= 2; pipes 1941 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.otg_inst = res_ctx->pipe_ctx[i].stream_res.tg->inst; pipes 1942 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.dp_lanes = 4; pipes 1943 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min; pipes 1944 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max; pipes 1945 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = res_ctx->pipe_ctx[i].prev_odm_pipe pipes 1947 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].pipe_idx; pipes 1950 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx; pipes 1956 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.hsplit_grp = first_pipe->pipe_idx; pipes 1962 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_type = dm_dp; pipes 1965 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_type = dm_edp; pipes 1970 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_type = dm_hdmi; pipes 1974 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_type = dm_dp; pipes 1975 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.dp_lanes = 4; pipes 2013 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_format = dm_444; pipes 2014 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_bpp = output_bpc * 3; pipes 2017 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_format = dm_420; pipes 2018 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_bpp = (output_bpc * 3) / 2; pipes 2022 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_format = dm_s422; pipes 2024 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_format = dm_n422; pipes 2025 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_bpp = output_bpc * 2; pipes 2028 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_format = dm_444; pipes 2029 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_bpp = output_bpc * 3; pipes 2033 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].dout.output_bpc = 12; pipes 2038 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.num_cursors = 2; pipes 2039 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.cur0_src_width = 256; pipes 2040 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.cur0_bpp = dm_cur_32bit; pipes 2041 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.cur1_src_width = 256; pipes 2042 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.cur1_bpp = dm_cur_32bit; pipes 2045 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_scan = dm_horz; pipes 2046 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.sw_mode = dm_sw_linear; pipes 2047 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.macro_tile_size = dm_64k_tile; pipes 2048 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_width = timing->h_addressable; pipes 2049 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pipes[pipe_cnt].pipe.src.viewport_width > 1920) pipes 2050 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_width = 1920; pipes 2051 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_height = timing->v_addressable; pipes 2052 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pipes[pipe_cnt].pipe.src.viewport_height > 1080) pipes 2053 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_height = 1080; pipes 2054 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch = ((pipes[pipe_cnt].pipe.src.viewport_width + 63) / 64) * 64; /* linear sw only */ pipes 2055 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_444_32; pipes 2056 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hratio*/ pipes 2057 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.recout_height = pipes[pipe_cnt].pipe.src.viewport_height; /*vp_height/vratio*/ pipes 2058 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width; /*when is_hsplit != 1*/ pipes 2059 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_height = pipes[pipe_cnt].pipe.dest.recout_height; /*when is_hsplit != 1*/ pipes 2060 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16; pipes 2061 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = 1.0; pipes 2062 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = 1.0; pipes 2063 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.scl_enable = 0; /*Lb only or Full scl*/ pipes 2064 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.htaps = 1; pipes 2065 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.vtaps = 1; pipes 2066 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.is_hsplit = 0; pipes 2067 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = 0; pipes 2068 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vtotal_min = timing->v_total; pipes 2069 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.vtotal_max = timing->v_total; pipes 2074 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.immediate_flip = pln->flip_immediate; pipes 2075 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.is_hsplit = (res_ctx->pipe_ctx[i].bottom_pipe pipes 2079 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_scan = pln->rotation == ROTATION_ANGLE_90 pipes 2081 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_y_y = scl->viewport.y; pipes 2082 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_y_c = scl->viewport_c.y; pipes 2083 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport.width; pipes 2084 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_width_c = scl->viewport_c.width; pipes 2085 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_height = scl->viewport.height; pipes 2086 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.viewport_height_c = scl->viewport_c.height; pipes 2088 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch; pipes 2089 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch_c = pln->plane_size.chroma_pitch; pipes 2090 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.meta_pitch = pln->dcc.meta_pitch; pipes 2091 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.meta_pitch_c = pln->dcc.meta_pitch_c; pipes 2093 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch; pipes 2094 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.meta_pitch = pln->dcc.meta_pitch; pipes 2096 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.dcc = pln->dcc.enable; pipes 2097 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.recout_width = scl->recout.width; pipes 2098 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.recout_height = scl->recout.height; pipes 2099 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width = scl->recout.width; pipes 2100 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_height = scl->recout.height; pipes 2102 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width += pipes 2104 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_height += pipes 2107 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width += pipes 2109 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_height += pipes 2113 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_16; pipes 2114 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio = (double) scl->ratios.horz.value / (1ULL<<32); pipes 2115 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.hscl_ratio_c = (double) scl->ratios.horz_c.value / (1ULL<<32); pipes 2116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio = (double) scl->ratios.vert.value / (1ULL<<32); pipes 2117 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.vscl_ratio_c = (double) scl->ratios.vert_c.value / (1ULL<<32); pipes 2118 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_ratio_depth.scl_enable = pipes 2124 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.htaps = scl->taps.h_taps; pipes 2125 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.htaps_c = scl->taps.h_taps_c; pipes 2126 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.vtaps = scl->taps.v_taps; pipes 2127 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.scale_taps.vtaps_c = scl->taps.v_taps_c; pipes 2129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.macro_tile_size = pipes 2132 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &pipes[pipe_cnt].pipe.src.sw_mode); pipes 2137 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_420_8; pipes 2141 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_420_10; pipes 2146 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_444_64; pipes 2150 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_444_16; pipes 2153 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_444_8; pipes 2156 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.source_format = dm_444_32; pipes 2165 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dc->res_pool->funcs->populate_dml_writeback_from_context(dc, res_ctx, pipes); pipes 2202 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_e2e_pipe_params_st *pipes, pipes 2232 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c wb_arb_params->cli_watermark[k] = get_wm_writeback_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2233 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c wb_arb_params->pstate_watermark[k] = get_wm_writeback_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2367 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_e2e_pipe_params_st *pipes, pipes 2384 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ASSERT(pipes); pipes 2385 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (!pipes) pipes 2444 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &context->res_ctx, pipes); pipes 2447 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &context->res_ctx, pipes); pipes 2458 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); pipes 2472 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); pipes 2630 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_e2e_pipe_params_st *pipes, pipes 2641 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.refclk_mhz = dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000.0; pipes 2642 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; pipes 2645 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = pipes 2648 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = pipes 2651 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = 0; pipes 2654 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = pipes 2657 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = pipes 2660 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = 0; pipes 2664 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz; pipes 2665 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz; pipes 2667 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (dc->debug.min_disp_clk_khz > pipes[pipe_cnt].clks_cfg.dispclk_mhz * 1000) pipes 2668 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dispclk_mhz = dc->debug.min_disp_clk_khz / 1000.0; pipes 2669 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (dc->debug.min_dpp_clk_khz > pipes[pipe_cnt].clks_cfg.dppclk_mhz * 1000) pipes 2670 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = dc->debug.min_dpp_clk_khz / 1000.0; pipes 2678 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &context->res_ctx, pipes); pipes 2681 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c &context->res_ctx, pipes); pipes 2686 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.voltage = vlevel; pipes 2687 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz; pipes 2688 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; pipes 2692 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.voltage = 1; pipes 2693 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].dcfclk_mhz; pipes 2694 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].socclk_mhz; pipes 2696 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2697 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2698 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2699 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2700 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2703 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.voltage = 2; pipes 2704 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; pipes 2705 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].socclk_mhz; pipes 2707 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2708 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2709 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2710 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2711 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.c.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2714 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.voltage = 3; pipes 2715 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; pipes 2716 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].socclk_mhz; pipes 2718 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.d.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2719 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.d.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2720 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.d.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2721 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.d.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2722 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.d.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2724 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.voltage = vlevel; pipes 2725 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz; pipes 2726 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; pipes 2727 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2728 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2729 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2730 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2731 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.watermarks.a.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; pipes 2736 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_e2e_pipe_params_st *pipes, pipes 2744 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dc->res_pool->funcs->set_mcif_arb_params(dc, context, pipes, pipe_cnt); pipes 2767 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_pipe_source_params_st *src = &pipes[pipe_idx_unsplit].pipe.src; pipes 2768 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_pipe_dest_params_st *dst = &pipes[pipe_idx_unsplit].pipe.dest; pipes 2780 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_pipe_source_params_st *src_j = &pipes[j].pipe.src; pipes 2781 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_pipe_dest_params_st *dst_j = &pipes[j].pipe.dest; pipes 2801 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) pipes 2802 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; pipes 2804 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; pipes 2806 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest; pipes 2824 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes, pipes 2833 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_idx].pipe); pipes 2848 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); pipes 2853 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel); pipes 2868 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dcn20_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel); pipes 2869 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel); pipes 2883 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c kfree(pipes); pipes 53 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes); pipes 59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes); pipes 116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h display_e2e_pipe_params_st *pipes, pipes 122 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h display_e2e_pipe_params_st *pipes, pipes 128 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h display_e2e_pipe_params_st *pipes, pipes 953 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c display_e2e_pipe_params_st *pipes, pipes 960 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[0].clks_cfg.voltage = vlevel; pipes 961 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; pipes 962 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; pipes 966 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; pipes 967 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) * 1000; pipes 968 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; pipes 969 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; pipes 970 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; pipes 972 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; pipes 973 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; pipes 981 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c display_e2e_pipe_params_st *pipes, pipes 997 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].clks_cfg.refclk_mhz = dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000.0; pipes 998 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb]; pipes 1001 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = pipes 1004 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = pipes 1007 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = 0; pipes 1010 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].clks_cfg.dppclk_mhz = pipes 1013 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = pipes 1016 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pipes[pipe_cnt].pipe.dest.odm_combine = 0; pipes 1024 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->res_ctx, pipes); pipes 1027 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->res_ctx, pipes); pipes 1042 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->bw_ctx.dml, pipes, pipe_cnt); pipes 1047 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->bw_ctx.dml, pipes, pipe_cnt); pipes 1052 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->bw_ctx.dml, pipes, pipe_cnt); pipes 1058 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c &context->bw_ctx.dml, pipes, pipe_cnt); pipes 1072 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); pipes 1077 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel); pipes 1092 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dcn21_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel); pipes 1093 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel); pipes 1107 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c kfree(pipes); pipes 47 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 54 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 60 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c || memcmp(pipes, mode_lib->vba.cache_pipes, pipes 65 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); pipes 68 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) pipes 81 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c #define dml_get_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) \ pipes 83 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); \ pipes 111 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c #define dml_get_pipe_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int which_pipe) \ pipes 114 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); \ pipes 146 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 152 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); pipes 159 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 162 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); pipes 168 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 173 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); pipes 181 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 187 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c recalculate_params(mode_lib, pipes, num_pipes); pipes 351 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_e2e_pipe_params_st *pipes = mode_lib->vba.cache_pipes; pipes 365 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_pipe_source_params_st *src = &pipes[j].pipe.src; pipes 366 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_pipe_dest_params_st *dst = &pipes[j].pipe.dest; pipes 367 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c scaler_ratio_depth_st *scl = &pipes[j].pipe.scale_ratio_depth; pipes 368 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c scaler_taps_st *taps = &pipes[j].pipe.scale_taps; pipes 369 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_output_params_st *dout = &pipes[j].dout; pipes 370 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_clocks_and_cfg_st *clks = &pipes[j].clks_cfg; pipes 583 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_pipe_source_params_st *src_k = &pipes[k].pipe.src; pipes 584 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c display_pipe_dest_params_st *dst_k = &pipes[k].pipe.dest; pipes 607 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c if (pipes[k].pipe.src.immediate_flip) pipes 639 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.SynchronizedVBlank = pipes[0].pipe.dest.synchronized_vblank_all_planes; pipes 641 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c ASSERT(mode_lib->vba.SynchronizedVBlank == pipes[k].pipe.dest.synchronized_vblank_all_planes); pipes 649 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.GPUVMEnable = mode_lib->vba.GPUVMEnable || !!pipes[k].pipe.src.gpuvm || !!pipes[k].pipe.src.vm; pipes 651 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c (pipes[k].pipe.src.gpuvm_levels_force_en pipes 653 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c < pipes[k].pipe.src.gpuvm_levels_force) ? pipes 654 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c pipes[k].pipe.src.gpuvm_levels_force : pipes 657 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c mode_lib->vba.HostVMEnable = mode_lib->vba.HostVMEnable || !!pipes[k].pipe.src.hostvm || !!pipes[k].pipe.src.vm; pipes 659 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c (pipes[k].pipe.src.hostvm_levels_force_en pipes 661 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c < pipes[k].pipe.src.hostvm_levels_force) ? pipes 662 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c pipes[k].pipe.src.hostvm_levels_force : pipes 682 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c const display_e2e_pipe_params_st *pipes, pipes 690 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c pipes, pipes 695 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); pipes 37 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h #define dml_get_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) pipes 61 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h #define dml_get_pipe_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int which_pipe) pipes 87 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h const display_e2e_pipe_params_st *pipes, pipes 93 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h const display_e2e_pipe_params_st *pipes, pipes 97 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h const display_e2e_pipe_params_st *pipes, pipes 101 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h const display_e2e_pipe_params_st *pipes, pipes 105 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h const display_e2e_pipe_params_st *pipes, pipes 107 drivers/gpu/drm/amd/display/dc/inc/core_types.h display_e2e_pipe_params_st *pipes); pipes 140 drivers/gpu/drm/amd/display/dc/inc/core_types.h display_e2e_pipe_params_st *pipes); pipes 145 drivers/gpu/drm/amd/display/dc/inc/core_types.h display_e2e_pipe_params_st *pipes, pipes 349 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*layer), pipes 447 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*wb_layer), pipes 586 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*compiz), pipes 743 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*scaler), pipes 851 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*splitter), pipes 921 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*merger), pipes 998 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*improc), pipes 1125 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*ctrlr), pipes 1156 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c pipe = d71->pipes[blk_id]; pipes 1169 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c pipe = d71->pipes[blk_id]; pipes 1187 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c pipe = d71->pipes[blk_id]; pipes 1196 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c pipe = d71->pipes[blk_id]; pipes 177 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c evts->pipes[0] |= KOMEDA_EVENT_FLIP; pipes 179 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c evts->pipes[1] |= KOMEDA_EVENT_FLIP; pipes 193 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c evts->pipes[0] |= get_pipeline_event(d71->pipes[0], gcu_status); pipes 196 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c evts->pipes[1] |= get_pipeline_event(d71->pipes[1], gcu_status); pipes 216 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c pipe = d71->pipes[i]; pipes 235 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c pipe = d71->pipes[i]; pipes 249 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c struct d71_pipeline *pipe = d71->pipes[master_pipe]; pipes 398 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c d71->pipes[i] = to_d71_pipeline(pipe); pipes 538 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c malidp_write32_mask(d71->pipes[i]->lpu_addr, LPU_TBU_CONTROL, pipes 41 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.h struct d71_pipeline *pipes[D71_MAX_PIPELINE]; pipes 174 drivers/gpu/drm/arm/display/komeda/komeda_crtc.c u32 events = evts->pipes[kcrtc->master->id]; pipes 71 drivers/gpu/drm/arm/display/komeda/komeda_dev.h u64 pipes[KOMEDA_MAX_PIPELINES]; pipes 588 drivers/gpu/drm/gma500/cdv_device.c .pipes = 2, pipes 520 drivers/gpu/drm/gma500/mdfld_device.c .pipes = 3, pipes 540 drivers/gpu/drm/gma500/oaktrail_device.c .pipes = 2, pipes 322 drivers/gpu/drm/gma500/psb_device.c .pipes = 2, pipes 233 drivers/gpu/drm/gma500/psb_drv.c dev_priv->num_pipe = dev_priv->ops->pipes; pipes 617 drivers/gpu/drm/gma500/psb_drv.h int pipes; /* Number of output pipes */ pipes 799 drivers/gpu/drm/i915/display/intel_dp.c unsigned int pipes = (1 << PIPE_A) | (1 << PIPE_B); pipes 813 drivers/gpu/drm/i915/display/intel_dp.c pipes &= ~(1 << intel_dp->pps_pipe); pipes 818 drivers/gpu/drm/i915/display/intel_dp.c pipes &= ~(1 << intel_dp->active_pipe); pipes 822 drivers/gpu/drm/i915/display/intel_dp.c if (pipes == 0) pipes 825 drivers/gpu/drm/i915/display/intel_dp.c return ffs(pipes) - 1; pipes 159 drivers/gpu/drm/i915/gvt/fb_decoder.h struct intel_vgpu_pipe_format pipes[I915_MAX_PIPES]; pipes 802 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c const enum mdp5_pipe *pipes, const uint32_t *offsets, pipes 811 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c hwpipe = mdp5_pipe_init(pipes[i], offsets[i], caps); pipes 815 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c pipe2name(pipes[i]), ret); pipes 134 drivers/gpu/drm/omapdrm/omap_drv.c struct omap_drm_pipeline *pipe = &priv->pipes[i]; pipes 167 drivers/gpu/drm/omapdrm/omap_drv.c pipe = &priv->pipes[priv->num_pipes++]; pipes 170 drivers/gpu/drm/omapdrm/omap_drv.c if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) { pipes 290 drivers/gpu/drm/omapdrm/omap_drv.c struct omap_drm_pipeline *pipe = &priv->pipes[i]; pipes 309 drivers/gpu/drm/omapdrm/omap_drv.c sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]), pipes 317 drivers/gpu/drm/omapdrm/omap_drv.c struct omap_drm_pipeline *pipe = &priv->pipes[i]; pipes 328 drivers/gpu/drm/omapdrm/omap_drv.c struct omap_drm_pipeline *pipe = &priv->pipes[i]; pipes 393 drivers/gpu/drm/omapdrm/omap_drv.c if (priv->pipes[i].connector) pipes 394 drivers/gpu/drm/omapdrm/omap_drv.c omap_connector_enable_hpd(priv->pipes[i].connector); pipes 407 drivers/gpu/drm/omapdrm/omap_drv.c if (priv->pipes[i].connector) pipes 408 drivers/gpu/drm/omapdrm/omap_drv.c omap_connector_disable_hpd(priv->pipes[i].connector); pipes 608 drivers/gpu/drm/omapdrm/omap_drv.c drm_crtc_vblank_off(priv->pipes[i].crtc); pipes 53 drivers/gpu/drm/omapdrm/omap_drv.h struct omap_drm_pipeline pipes[8]; pipes 223 drivers/gpu/drm/omapdrm/omap_irq.c struct drm_crtc *crtc = priv->pipes[id].crtc; pipes 120 drivers/net/wireless/ath/ath10k/usb.c ath10k_usb_free_pipe_resources(ar, &ar_usb->pipes[i]); pipes 264 drivers/net/wireless/ath/ath10k/usb.c if (ar_usb->pipes[i].ar_usb) { pipes 265 drivers/net/wireless/ath/ath10k/usb.c usb_kill_anchored_urbs(&ar_usb->pipes[i].urb_submitted); pipes 266 drivers/net/wireless/ath/ath10k/usb.c cancel_work_sync(&ar_usb->pipes[i].io_complete_work); pipes 275 drivers/net/wireless/ath/ath10k/usb.c ar_usb->pipes[ATH10K_USB_PIPE_RX_DATA].urb_cnt_thresh = 1; pipes 278 drivers/net/wireless/ath/ath10k/usb.c &ar_usb->pipes[ATH10K_USB_PIPE_RX_DATA]); pipes 395 drivers/net/wireless/ath/ath10k/usb.c ar_usb->pipes[i].urb_cnt_thresh = pipes 396 drivers/net/wireless/ath/ath10k/usb.c ar_usb->pipes[i].urb_alloc / 2; pipes 406 drivers/net/wireless/ath/ath10k/usb.c struct ath10k_usb_pipe *pipe = &ar_usb->pipes[pipe_id]; pipes 471 drivers/net/wireless/ath/ath10k/usb.c return ar_usb->pipes[pipe_id].urb_cnt; pipes 876 drivers/net/wireless/ath/ath10k/usb.c pipe = &ar_usb->pipes[pipe_num]; pipes 946 drivers/net/wireless/ath/ath10k/usb.c pipe = &ar_usb->pipes[i]; pipes 1071 drivers/net/wireless/ath/ath10k/usb.c &ar_usb->pipes[ATH10K_USB_PIPE_RX_DATA]); pipes 98 drivers/net/wireless/ath/ath10k/usb.h struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX]; pipes 70 drivers/net/wireless/ath/ath6kl/usb.c struct ath6kl_usb_pipe pipes[ATH6KL_USB_PIPE_MAX]; pipes 254 drivers/net/wireless/ath/ath6kl/usb.c ath6kl_usb_free_pipe_resources(&ar_usb->pipes[i]); pipes 352 drivers/net/wireless/ath/ath6kl/usb.c pipe = &ar_usb->pipes[pipe_num]; pipes 468 drivers/net/wireless/ath/ath6kl/usb.c if (ar_usb->pipes[i].ar_usb != NULL) pipes 469 drivers/net/wireless/ath/ath6kl/usb.c usb_kill_anchored_urbs(&ar_usb->pipes[i].urb_submitted); pipes 490 drivers/net/wireless/ath/ath6kl/usb.c ar_usb->pipes[ATH6KL_USB_PIPE_RX_DATA].urb_cnt_thresh = 1; pipes 492 drivers/net/wireless/ath/ath6kl/usb.c ath6kl_usb_post_recv_transfers(&ar_usb->pipes[ATH6KL_USB_PIPE_RX_DATA], pipes 639 drivers/net/wireless/ath/ath6kl/usb.c pipe = &ar_usb->pipes[i]; pipes 695 drivers/net/wireless/ath/ath6kl/usb.c device->pipes[i].urb_cnt_thresh = pipes 696 drivers/net/wireless/ath/ath6kl/usb.c device->pipes[i].urb_alloc / 2; pipes 704 drivers/net/wireless/ath/ath6kl/usb.c struct ath6kl_usb_pipe *pipe = &device->pipes[PipeID]; pipes 849 drivers/net/wireless/ath/ath6kl/usb.c return device->pipes[pipe_id].urb_cnt; pipes 1196 drivers/net/wireless/ath/ath6kl/usb.c ath6kl_usb_post_recv_transfers(&device->pipes[ATH6KL_USB_PIPE_RX_DATA], pipes 1198 drivers/net/wireless/ath/ath6kl/usb.c ath6kl_usb_post_recv_transfers(&device->pipes[ATH6KL_USB_PIPE_RX_DATA2], pipes 553 drivers/nfc/microread/microread.c u8 gate = hdev->pipes[pipe].gate; pipes 720 drivers/nfc/pn544/pn544.c u8 gate = hdev->pipes[pipe].gate; pipes 230 drivers/nfc/st-nci/se.c ndev->hci_dev->pipes[pipe_info[2]].gate = pipes 232 drivers/nfc/st-nci/se.c ndev->hci_dev->pipes[pipe_info[2]].host = pipes 364 drivers/nfc/st-nci/se.c u8 gate = ndev->hci_dev->pipes[pipe].gate; pipes 365 drivers/nfc/st-nci/se.c u8 host = ndev->hci_dev->pipes[pipe].host; pipes 385 drivers/nfc/st-nci/se.c u8 gate = ndev->hci_dev->pipes[pipe].gate; pipes 392 drivers/nfc/st-nci/se.c ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID) pipes 186 drivers/nfc/st21nfca/core.c hdev->pipes[pipe_info[2]].gate = pipes 188 drivers/nfc/st21nfca/core.c hdev->pipes[pipe_info[2]].dest_host = pipes 838 drivers/nfc/st21nfca/core.c u8 gate = hdev->pipes[pipe].gate; pipes 845 drivers/nfc/st21nfca/core.c hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID) pipes 894 drivers/nfc/st21nfca/core.c u8 gate = hdev->pipes[pipe].gate; pipes 895 drivers/nfc/st21nfca/core.c u8 host = hdev->pipes[pipe].dest_host; pipes 198 drivers/platform/goldfish/goldfish_pipe.c struct goldfish_pipe **pipes; pipes 536 drivers/platform/goldfish/goldfish_pipe.c pipe = dev->pipes[id]; pipes 668 drivers/platform/goldfish/goldfish_pipe.c if (!dev->pipes[id]) pipes 677 drivers/platform/goldfish/goldfish_pipe.c struct goldfish_pipe **pipes = pipes 678 drivers/platform/goldfish/goldfish_pipe.c kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC); pipes 679 drivers/platform/goldfish/goldfish_pipe.c if (!pipes) pipes 681 drivers/platform/goldfish/goldfish_pipe.c memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); pipes 682 drivers/platform/goldfish/goldfish_pipe.c kfree(dev->pipes); pipes 683 drivers/platform/goldfish/goldfish_pipe.c dev->pipes = pipes; pipes 746 drivers/platform/goldfish/goldfish_pipe.c dev->pipes[id] = pipe; pipes 765 drivers/platform/goldfish/goldfish_pipe.c dev->pipes[id] = NULL; pipes 784 drivers/platform/goldfish/goldfish_pipe.c dev->pipes[pipe->id] = NULL; pipes 846 drivers/platform/goldfish/goldfish_pipe.c dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes), pipes 848 drivers/platform/goldfish/goldfish_pipe.c if (!dev->pipes) { pipes 863 drivers/platform/goldfish/goldfish_pipe.c kfree(dev->pipes); pipes 889 drivers/platform/goldfish/goldfish_pipe.c kfree(dev->pipes); pipes 79 drivers/staging/media/ipu3/ipu3-css-fw.c &css->fwp->binary_header[css->pipes[pipe].bindex]; pipes 375 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 861 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1641 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1669 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1695 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1735 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1909 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1927 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1954 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 2732 drivers/staging/media/ipu3/ipu3-css-params.c &css->fwp->binary_header[css->pipes[pipe].bindex]; pipes 2767 drivers/staging/media/ipu3/ipu3-css-params.c if (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_VIDEO) { pipes 2810 drivers/staging/media/ipu3/ipu3-css-params.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 668 drivers/staging/media/ipu3/ipu3-css.c &css->pipes[pipe].pool.parameter_set_info); pipes 669 drivers/staging/media/ipu3/ipu3-css.c imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.acc); pipes 670 drivers/staging/media/ipu3/ipu3-css.c imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.gdc); pipes 671 drivers/staging/media/ipu3/ipu3-css.c imgu_css_pool_cleanup(imgu, &css->pipes[pipe].pool.obgrid); pipes 675 drivers/staging/media/ipu3/ipu3-css.c &css->pipes[pipe].pool.binary_params_p[i]); pipes 700 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1206 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1229 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1261 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1419 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1440 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1469 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1513 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1559 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1602 drivers/staging/media/ipu3/ipu3-css.c (css->pipes[pipe].pipe_id == IPU3_CSS_PIPE_ID_CAPTURE) ? pipes 1840 drivers/staging/media/ipu3/ipu3-css.c css->pipes[pipe].bindex = ret; pipes 1843 drivers/staging/media/ipu3/ipu3-css.c css->pipes[pipe].bindex, pipe); pipes 1883 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1938 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 1949 drivers/staging/media/ipu3/ipu3-css.c if (b->queue_pos >= ARRAY_SIZE(css->pipes[pipe].abi_buffers[b->queue])) pipes 1951 drivers/staging/media/ipu3/ipu3-css.c abi_buf = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].vaddr; pipes 1975 drivers/staging/media/ipu3/ipu3-css.c data = css->pipes[pipe].abi_buffers[b->queue][b->queue_pos].daddr; pipes 2049 drivers/staging/media/ipu3/ipu3-css.c css_pipe = &css->pipes[pipe]; pipes 2098 drivers/staging/media/ipu3/ipu3-css.c css_pipe = &css->pipes[pipe]; pipes 2145 drivers/staging/media/ipu3/ipu3-css.c struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; pipes 160 drivers/staging/media/ipu3/ipu3-css.h struct imgu_css_pipe pipes[IMGU_MAX_PIPE_NUM]; pipes 66 drivers/staging/media/ipu3/ipu3-v4l2.c struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; pipes 658 drivers/staging/media/ipu3/ipu3-v4l2.c struct imgu_css_pipe *css_pipe = &imgu->css.pipes[pipe]; pipes 130 include/net/nfc/hci.h struct nfc_hci_pipe pipes[NFC_HCI_MAX_PIPES]; pipes 184 include/net/nfc/nci_core.h struct nci_hci_pipe pipes[NCI_HCI_MAX_PIPES]; pipes 354 net/nfc/hci/command.c hdev->pipes[pipe].gate = dest_gate; pipes 355 net/nfc/hci/command.c hdev->pipes[pipe].dest_host = dest_host; pipes 42 net/nfc/hci/core.c hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; pipes 43 net/nfc/hci/core.c hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; pipes 54 net/nfc/hci/core.c if (hdev->pipes[i].dest_host != host) pipes 57 net/nfc/hci/core.c hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; pipes 58 net/nfc/hci/core.c hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; pipes 197 net/nfc/hci/core.c gate = hdev->pipes[pipe].gate; pipes 218 net/nfc/hci/core.c hdev->pipes[create_info->pipe].gate = create_info->dest_gate; pipes 219 net/nfc/hci/core.c hdev->pipes[create_info->pipe].dest_host = pipes 240 net/nfc/hci/core.c hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; pipes 241 net/nfc/hci/core.c hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; pipes 392 net/nfc/hci/core.c gate = hdev->pipes[pipe].gate; pipes 115 net/nfc/nci/hci.c hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; pipes 116 net/nfc/nci/hci.c hdev->pipes[i].host = NCI_HCI_INVALID_HOST; pipes 126 net/nfc/nci/hci.c if (ndev->hci_dev->pipes[i].host == host) { pipes 127 net/nfc/nci/hci.c ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; pipes 128 net/nfc/nci/hci.c ndev->hci_dev->pipes[i].host = NCI_HCI_INVALID_HOST; pipes 285 net/nfc/nci/hci.c u8 gate = ndev->hci_dev->pipes[pipe].gate; pipes 314 net/nfc/nci/hci.c ndev->hci_dev->pipes[new_pipe].gate = dest_gate; pipes 315 net/nfc/nci/hci.c ndev->hci_dev->pipes[new_pipe].host = pipes 336 net/nfc/nci/hci.c ndev->hci_dev->pipes[delete_info->pipe].gate = pipes 338 net/nfc/nci/hci.c ndev->hci_dev->pipes[delete_info->pipe].host = pipes 695 net/nfc/nci/hci.c ndev->hci_dev->pipes[pipe].gate = dest_gate; pipes 696 net/nfc/nci/hci.c ndev->hci_dev->pipes[pipe].host = dest_host; pipes 313 sound/sparc/dbri.c struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ pipes 770 sound/sparc/dbri.c dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; pipes 814 sound/sparc/dbri.c return ((pipe >= 0) && (dbri->pipes[pipe].desc != -1)); pipes 834 sound/sparc/dbri.c sdp = dbri->pipes[pipe].sdp; pipes 847 sound/sparc/dbri.c desc = dbri->pipes[pipe].first_desc; pipes 853 sound/sparc/dbri.c } while (desc != -1 && desc != dbri->pipes[pipe].first_desc); pipes 855 sound/sparc/dbri.c dbri->pipes[pipe].desc = -1; pipes 856 sound/sparc/dbri.c dbri->pipes[pipe].first_desc = -1; pipes 883 sound/sparc/dbri.c dbri->pipes[pipe].sdp = sdp; pipes 884 sound/sparc/dbri.c dbri->pipes[pipe].desc = -1; pipes 885 sound/sparc/dbri.c dbri->pipes[pipe].first_desc = -1; pipes 908 sound/sparc/dbri.c if (dbri->pipes[pipe].sdp == 0 pipes 909 sound/sparc/dbri.c || dbri->pipes[prevpipe].sdp == 0 pipes 910 sound/sparc/dbri.c || dbri->pipes[nextpipe].sdp == 0) { pipes 916 sound/sparc/dbri.c dbri->pipes[prevpipe].nextpipe = pipe; pipes 917 sound/sparc/dbri.c dbri->pipes[pipe].nextpipe = nextpipe; pipes 918 sound/sparc/dbri.c dbri->pipes[pipe].length = length; pipes 922 sound/sparc/dbri.c if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { pipes 1012 sound/sparc/dbri.c if (D_SDP_MODE(dbri->pipes[pipe].sdp) == 0) { pipes 1018 sound/sparc/dbri.c if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { pipes 1023 sound/sparc/dbri.c if (!(dbri->pipes[pipe].sdp & D_SDP_TO_SER)) { pipes 1031 sound/sparc/dbri.c if (dbri->pipes[pipe].sdp & D_SDP_MSB) pipes 1032 sound/sparc/dbri.c data = reverse_bytes(data, dbri->pipes[pipe].length); pipes 1055 sound/sparc/dbri.c if (D_SDP_MODE(dbri->pipes[pipe].sdp) != D_SDP_FIXED) { pipes 1061 sound/sparc/dbri.c if (dbri->pipes[pipe].sdp & D_SDP_TO_SER) { pipes 1067 sound/sparc/dbri.c dbri->pipes[pipe].recv_fixed_ptr = ptr; pipes 1101 sound/sparc/dbri.c if (dbri->pipes[info->pipe].sdp == 0) { pipes 1111 sound/sparc/dbri.c if (!(dbri->pipes[info->pipe].sdp & D_SDP_TO_SER)) { pipes 1117 sound/sparc/dbri.c if (dbri->pipes[info->pipe].sdp & D_SDP_TO_SER) { pipes 1137 sound/sparc/dbri.c desc = dbri->pipes[info->pipe].first_desc; pipes 1144 sound/sparc/dbri.c desc != dbri->pipes[info->pipe].first_desc); pipes 1146 sound/sparc/dbri.c dbri->pipes[info->pipe].desc = -1; pipes 1147 sound/sparc/dbri.c dbri->pipes[info->pipe].first_desc = -1; pipes 1207 sound/sparc/dbri.c dbri->pipes[info->pipe].first_desc = first_desc; pipes 1208 sound/sparc/dbri.c dbri->pipes[info->pipe].desc = first_desc; pipes 1259 sound/sparc/dbri.c dbri->pipes[16].sdp = 1; pipes 1260 sound/sparc/dbri.c dbri->pipes[16].nextpipe = 16; pipes 1723 sound/sparc/dbri.c first_td = dbri->pipes[info->pipe].first_desc; pipes 1731 sound/sparc/dbri.c dbri->pipes[info->pipe].sdp pipes 1738 sound/sparc/dbri.c dbri->pipes[info->pipe].desc = first_td; pipes 1745 sound/sparc/dbri.c first_td = dbri->pipes[info->pipe].first_desc; pipes 1753 sound/sparc/dbri.c dbri->pipes[info->pipe].sdp pipes 1760 sound/sparc/dbri.c dbri->pipes[info->pipe].desc = first_td; pipes 1784 sound/sparc/dbri.c int td = dbri->pipes[pipe].desc; pipes 1803 sound/sparc/dbri.c dbri->pipes[pipe].desc = td; pipes 1815 sound/sparc/dbri.c int rd = dbri->pipes[pipe].desc; pipes 1823 sound/sparc/dbri.c dbri->pipes[pipe].desc = dbri->next_desc[rd]; pipes 1881 sound/sparc/dbri.c int td = dbri->pipes[pipe].desc; pipes 1886 sound/sparc/dbri.c dbri->pipes[pipe].sdp pipes 1895 sound/sparc/dbri.c if (dbri->pipes[channel].sdp & D_SDP_MSB) pipes 1896 sound/sparc/dbri.c val = reverse_bytes(val, dbri->pipes[channel].length); pipes 1898 sound/sparc/dbri.c if (dbri->pipes[channel].recv_fixed_ptr) pipes 1899 sound/sparc/dbri.c *(dbri->pipes[channel].recv_fixed_ptr) = val; pipes 2498 sound/sparc/dbri.c struct dbri_pipe *pptr = &dbri->pipes[pipe];