pipeconf_val     1626 drivers/gpu/drm/i915/display/intel_display.c 	u32 val, pipeconf_val;
pipeconf_val     1646 drivers/gpu/drm/i915/display/intel_display.c 	pipeconf_val = I915_READ(PIPECONF(pipe));
pipeconf_val     1658 drivers/gpu/drm/i915/display/intel_display.c 			val |= pipeconf_val & PIPECONF_BPC_MASK;
pipeconf_val     1662 drivers/gpu/drm/i915/display/intel_display.c 	if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK) {
pipeconf_val     1680 drivers/gpu/drm/i915/display/intel_display.c 	u32 val, pipeconf_val;
pipeconf_val     1692 drivers/gpu/drm/i915/display/intel_display.c 	pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));
pipeconf_val     1694 drivers/gpu/drm/i915/display/intel_display.c 	if ((pipeconf_val & PIPECONF_INTERLACE_MASK_HSW) ==