pipeconf_reg      122 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	u32 pipeconf_reg = PIPEACONF;
pipeconf_reg      129 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		pipeconf_reg = PIPECCONF;
pipeconf_reg      136 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		REG_WRITE(pipeconf_reg, BIT(31));
pipeconf_reg      138 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		if (REG_BIT_WAIT(pipeconf_reg, 1, 30))
pipeconf_reg      163 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		REG_FLD_MOD(pipeconf_reg, 0, 31, 31);
pipeconf_reg      165 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		if (REG_BIT_WAIT(pipeconf_reg, 0, 30))
pipeconf_reg      826 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	u32 pipeconf_reg = PIPEACONF;
pipeconf_reg      839 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		pipeconf_reg = PIPECCONF;
pipeconf_reg      867 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		if (REG_BIT_WAIT(pipeconf_reg, 1, 29))
pipeconf_reg      909 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	REG_WRITE(pipeconf_reg, pipeconf);
pipeconf_reg      910 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	REG_READ(pipeconf_reg);
pipeconf_reg      631 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 	pkg_sender->pipeconf_reg = map->conf;
pipeconf_reg       48 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h 	u32 pipeconf_reg;
pipeconf_reg      280 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
pipeconf_reg      363 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	pipeconf = REG_READ(pipeconf_reg);
pipeconf_reg      366 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(pipeconf_reg, pipeconf);
pipeconf_reg      367 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_READ(pipeconf_reg);
pipeconf_reg      505 drivers/gpu/drm/gma500/psb_irq.c 	uint32_t pipeconf_reg = mid_pipeconf(pipe);
pipeconf_reg      513 drivers/gpu/drm/gma500/psb_irq.c 		reg_val = REG_READ(pipeconf_reg);
pipeconf_reg      569 drivers/gpu/drm/gma500/psb_irq.c 	uint32_t pipeconf_reg = mid_pipeconf(pipe);
pipeconf_reg      572 drivers/gpu/drm/gma500/psb_irq.c 		reg_val = REG_READ(pipeconf_reg);
pipeconf_reg      616 drivers/gpu/drm/gma500/psb_irq.c 	uint32_t pipeconf_reg = PIPEACONF;
pipeconf_reg      626 drivers/gpu/drm/gma500/psb_irq.c 		pipeconf_reg = PIPEBCONF;
pipeconf_reg      631 drivers/gpu/drm/gma500/psb_irq.c 		pipeconf_reg = PIPECCONF;
pipeconf_reg      641 drivers/gpu/drm/gma500/psb_irq.c 	reg_val = REG_READ(pipeconf_reg);
pipeconf_reg      651 drivers/gpu/drm/i915/display/intel_crt.c 		vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg;
pipeconf_reg      661 drivers/gpu/drm/i915/display/intel_crt.c 	pipeconf_reg = PIPECONF(pipe);
pipeconf_reg      678 drivers/gpu/drm/i915/display/intel_crt.c 		u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
pipeconf_reg      680 drivers/gpu/drm/i915/display/intel_crt.c 				   pipeconf_reg,
pipeconf_reg      682 drivers/gpu/drm/i915/display/intel_crt.c 		intel_uncore_posting_read(uncore, pipeconf_reg);
pipeconf_reg      691 drivers/gpu/drm/i915/display/intel_crt.c 		intel_uncore_write(uncore, pipeconf_reg, pipeconf);