pipeconf          581 drivers/gpu/drm/gma500/cdv_intel_display.c 	u32 dpll = 0, dspcntr, pipeconf;
pipeconf          688 drivers/gpu/drm/gma500/cdv_intel_display.c 	pipeconf = REG_READ(map->conf);
pipeconf          690 drivers/gpu/drm/gma500/cdv_intel_display.c 	pipeconf &= ~(PIPE_BPC_MASK);
pipeconf          694 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_8BPC;
pipeconf          697 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_6BPC;
pipeconf          700 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_10BPC;
pipeconf          703 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_8BPC;
pipeconf          709 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_8BPC;
pipeconf          711 drivers/gpu/drm/gma500/cdv_intel_display.c 			pipeconf |= PIPE_6BPC;
pipeconf          713 drivers/gpu/drm/gma500/cdv_intel_display.c 		pipeconf |= PIPE_8BPC;
pipeconf          724 drivers/gpu/drm/gma500/cdv_intel_display.c 	pipeconf |= PIPEACONF_ENABLE;
pipeconf          807 drivers/gpu/drm/gma500/cdv_intel_display.c 	REG_WRITE(map->conf, pipeconf);
pipeconf          828 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	u32 pipeconf, dspcntr;
pipeconf          835 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	pipeconf = dev_priv->pipeconf[pipe];
pipeconf          909 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 	REG_WRITE(pipeconf_reg, pipeconf);
pipeconf          302 drivers/gpu/drm/gma500/mdfld_intel_display.c 	u32 pipeconf = dev_priv->pipeconf[pipe];
pipeconf          366 drivers/gpu/drm/gma500/mdfld_intel_display.c 			REG_WRITE(map->conf, pipeconf);
pipeconf          845 drivers/gpu/drm/gma500/mdfld_intel_display.c 	dev_priv->pipeconf[pipe] = PIPEACONF_ENABLE; /* FIXME_JLIU7 REG_READ(pipeconf_reg); */
pipeconf         1000 drivers/gpu/drm/gma500/mdfld_intel_display.c 	REG_WRITE(map->conf, dev_priv->pipeconf[pipe]);
pipeconf          370 drivers/gpu/drm/gma500/oaktrail_crtc.c 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;
pipeconf          484 drivers/gpu/drm/gma500/oaktrail_crtc.c 	pipeconf = REG_READ(map->conf);
pipeconf          575 drivers/gpu/drm/gma500/oaktrail_crtc.c 		REG_WRITE_WITH_AUX(map->conf, pipeconf, i);
pipeconf          283 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	u32 dspcntr, pipeconf, dpll, temp;
pipeconf          363 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	pipeconf = REG_READ(pipeconf_reg);
pipeconf          364 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	pipeconf |= PIPEACONF_ENABLE;
pipeconf          366 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(pipeconf_reg, pipeconf);
pipeconf          369 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(PCH_PIPEBCONF, pipeconf);
pipeconf          591 drivers/gpu/drm/gma500/psb_drv.h 	u32 pipeconf[3];
pipeconf          105 drivers/gpu/drm/gma500/psb_intel_display.c 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;
pipeconf          191 drivers/gpu/drm/gma500/psb_intel_display.c 	pipeconf = REG_READ(map->conf);
pipeconf          202 drivers/gpu/drm/gma500/psb_intel_display.c 	pipeconf |= PIPEACONF_ENABLE;
pipeconf          281 drivers/gpu/drm/gma500/psb_intel_display.c 	REG_WRITE(map->conf, pipeconf);
pipeconf          678 drivers/gpu/drm/i915/display/intel_crt.c 		u32 pipeconf = intel_uncore_read(uncore, pipeconf_reg);
pipeconf          681 drivers/gpu/drm/i915/display/intel_crt.c 				   pipeconf | PIPECONF_FORCE_BORDER);
pipeconf          691 drivers/gpu/drm/i915/display/intel_crt.c 		intel_uncore_write(uncore, pipeconf_reg, pipeconf);
pipeconf         8283 drivers/gpu/drm/i915/display/intel_display.c 	u32 pipeconf;
pipeconf         8285 drivers/gpu/drm/i915/display/intel_display.c 	pipeconf = 0;
pipeconf         8289 drivers/gpu/drm/i915/display/intel_display.c 		pipeconf |= I915_READ(PIPECONF(crtc->pipe)) & PIPECONF_ENABLE;
pipeconf         8292 drivers/gpu/drm/i915/display/intel_display.c 		pipeconf |= PIPECONF_DOUBLE_WIDE;
pipeconf         8299 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_DITHER_EN |
pipeconf         8304 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_6BPC;
pipeconf         8307 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_8BPC;
pipeconf         8310 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_10BPC;
pipeconf         8321 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
pipeconf         8323 drivers/gpu/drm/i915/display/intel_display.c 			pipeconf |= PIPECONF_INTERLACE_W_SYNC_SHIFT;
pipeconf         8325 drivers/gpu/drm/i915/display/intel_display.c 		pipeconf |= PIPECONF_PROGRESSIVE;
pipeconf         8330 drivers/gpu/drm/i915/display/intel_display.c 		pipeconf |= PIPECONF_COLOR_RANGE_SELECT;
pipeconf         8332 drivers/gpu/drm/i915/display/intel_display.c 	pipeconf |= PIPECONF_GAMMA_MODE(crtc_state->gamma_mode);
pipeconf         8334 drivers/gpu/drm/i915/display/intel_display.c 	I915_WRITE(PIPECONF(crtc->pipe), pipeconf);