pipe_wm          3090 drivers/gpu/drm/i915/intel_pm.c 				 struct intel_pipe_wm *pipe_wm)
pipe_wm          3095 drivers/gpu/drm/i915/intel_pm.c 		.sprites_enabled = pipe_wm->sprites_enabled,
pipe_wm          3096 drivers/gpu/drm/i915/intel_pm.c 		.sprites_scaled = pipe_wm->sprites_scaled,
pipe_wm          3104 drivers/gpu/drm/i915/intel_pm.c 	if (!ilk_validate_wm_level(0, &max, &pipe_wm->wm[0])) {
pipe_wm          3117 drivers/gpu/drm/i915/intel_pm.c 	struct intel_pipe_wm *pipe_wm;
pipe_wm          3128 drivers/gpu/drm/i915/intel_pm.c 	pipe_wm = &crtc_state->wm.ilk.optimal;
pipe_wm          3141 drivers/gpu/drm/i915/intel_pm.c 	pipe_wm->pipe_enabled = crtc_state->base.active;
pipe_wm          3143 drivers/gpu/drm/i915/intel_pm.c 		pipe_wm->sprites_enabled = sprstate->base.visible;
pipe_wm          3144 drivers/gpu/drm/i915/intel_pm.c 		pipe_wm->sprites_scaled = sprstate->base.visible &&
pipe_wm          3152 drivers/gpu/drm/i915/intel_pm.c 	if (INTEL_GEN(dev_priv) <= 6 && pipe_wm->sprites_enabled)
pipe_wm          3156 drivers/gpu/drm/i915/intel_pm.c 	if (pipe_wm->sprites_scaled)
pipe_wm          3159 drivers/gpu/drm/i915/intel_pm.c 	memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
pipe_wm          3161 drivers/gpu/drm/i915/intel_pm.c 			     pristate, sprstate, curstate, &pipe_wm->wm[0]);
pipe_wm          3164 drivers/gpu/drm/i915/intel_pm.c 		pipe_wm->linetime = hsw_compute_linetime_wm(crtc_state);
pipe_wm          3166 drivers/gpu/drm/i915/intel_pm.c 	if (!ilk_validate_pipe_wm(dev_priv, pipe_wm))
pipe_wm          3172 drivers/gpu/drm/i915/intel_pm.c 		struct intel_wm_level *wm = &pipe_wm->wm[level];
pipe_wm          3343 drivers/gpu/drm/i915/intel_pm.c static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *pipe_wm)
pipe_wm          3346 drivers/gpu/drm/i915/intel_pm.c 	return wm_lp + (wm_lp >= 2 && pipe_wm->wm[4].enable);
pipe_wm          5092 drivers/gpu/drm/i915/intel_pm.c 	struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
pipe_wm          5101 drivers/gpu/drm/i915/intel_pm.c 	memset(pipe_wm->planes, 0, sizeof(pipe_wm->planes));
pipe_wm          5116 drivers/gpu/drm/i915/intel_pm.c 	pipe_wm->linetime = skl_compute_linetime_wm(crtc_state);
pipe_wm          5653 drivers/gpu/drm/i915/intel_pm.c 	struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
pipe_wm          5659 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(PIPE_WM_LINETIME(pipe), pipe_wm->linetime);