pipe_staged       826 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	const struct drm_plane_state *pipe_staged[SSPP_MAX];
pipe_staged       853 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	memset(pipe_staged, 0, sizeof(pipe_staged));
pipe_staged       880 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		if (pipe_staged[pstates[cnt].pipe_id]) {
pipe_staged       882 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 				pipe_staged[pstates[cnt].pipe_id];
pipe_staged       886 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			pipe_staged[pstates[cnt].pipe_id] = NULL;
pipe_staged       888 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			pipe_staged[pstates[cnt].pipe_id] = pstate;
pipe_staged       905 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 		if (pipe_staged[i]) {
pipe_staged       906 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			dpu_plane_clear_multirect(pipe_staged[i]);
pipe_staged       908 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 			if (is_dpu_plane_virtual(pipe_staged[i]->plane)) {
pipe_staged       911 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 					pipe_staged[i]->plane->base.id);