pipe_split_from 2369 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c int *pipe_split_from, pipe_split_from 2483 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipe_split_from[i] = -1; pipe_split_from 2532 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (!pipe->stream || pipe_split_from[i] >= 0) pipe_split_from 2551 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipe_split_from[hsplit_pipe->pipe_idx] = pipe_idx; pipe_split_from 2600 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipe_split_from[hsplit_pipe->pipe_idx] = pipe_idx; pipe_split_from 2632 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c int *pipe_split_from, pipe_split_from 2644 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pipe_split_from[i] < 0) { pipe_split_from 2655 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_from[i]]; pipe_split_from 2656 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_split_from[i]] == pipe_split_from[i]) pipe_split_from 2658 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel][pipe_split_from[i]]; pipe_split_from 2846 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c int pipe_split_from[MAX_PIPES]; pipe_split_from 2853 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel); pipe_split_from 2868 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dcn20_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel); pipe_split_from 124 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h int *pipe_split_from, pipe_split_from 983 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c int *pipe_split_from, pipe_split_from 1000 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (pipe_split_from[i] < 0) { pipe_split_from 1011 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_from[i]]; pipe_split_from 1012 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_split_from[i]] == pipe_split_from[i]) pipe_split_from 1014 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_split_from[i]]; pipe_split_from 1070 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c int pipe_split_from[MAX_PIPES]; pipe_split_from 1077 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel); pipe_split_from 1092 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dcn21_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel);