pipe_hw            91 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	struct dpu_hw_pipe *pipe_hw;
pipe_hw           260 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_hw->ops.setup_creq_lut(pdpu->pipe_hw, &pdpu->pipe_qos_cfg);
pipe_hw           315 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_hw->ops.setup_danger_safe_lut(pdpu->pipe_hw,
pipe_hw           360 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_hw->ops.setup_qos_ctrl(pdpu->pipe_hw,
pipe_hw           377 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	ot_params.xin_id = pdpu->pipe_hw->cap->xin_id;
pipe_hw           378 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	ot_params.num = pdpu->pipe_hw->idx - SSPP_NONE;
pipe_hw           384 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl;
pipe_hw           402 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	qos_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl;
pipe_hw           403 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	qos_params.xin_id = pdpu->pipe_hw->cap->xin_id;
pipe_hw           404 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	qos_params.num = pdpu->pipe_hw->idx - SSPP_VIG0;
pipe_hw           431 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	else if (pdpu->pipe_hw->ops.setup_sourceaddress) {
pipe_hw           432 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		trace_dpu_plane_set_scanout(pdpu->pipe_hw->idx,
pipe_hw           435 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_sourceaddress(pdpu->pipe_hw, pipe_cfg,
pipe_hw           588 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (fmt && pdpu->pipe_hw->ops.setup_solidfill) {
pipe_hw           589 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_solidfill(pdpu->pipe_hw,
pipe_hw           602 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		if (pdpu->pipe_hw->ops.setup_format)
pipe_hw           603 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw,
pipe_hw           607 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		if (pdpu->pipe_hw->ops.setup_rects)
pipe_hw           608 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw->ops.setup_rects(pdpu->pipe_hw,
pipe_hw           612 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		if (pdpu->pipe_hw->ops.setup_pe)
pipe_hw           613 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw,
pipe_hw           616 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		if (pdpu->pipe_hw->ops.setup_scaler &&
pipe_hw           618 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw,
pipe_hw           945 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	else if (pdpu->pipe_hw && pdpu->csc_ptr && pdpu->pipe_hw->ops.setup_csc)
pipe_hw           946 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_csc(pdpu->pipe_hw, pdpu->csc_ptr);
pipe_hw          1011 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu->pipe_hw->ops.setup_rects) {
pipe_hw          1012 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_rects(pdpu->pipe_hw,
pipe_hw          1017 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu->pipe_hw->ops.setup_pe &&
pipe_hw          1019 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw,
pipe_hw          1027 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu->pipe_hw->ops.setup_scaler &&
pipe_hw          1029 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw,
pipe_hw          1033 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu->pipe_hw->ops.setup_multirect)
pipe_hw          1034 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_multirect(
pipe_hw          1035 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 				pdpu->pipe_hw,
pipe_hw          1039 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu->pipe_hw->ops.setup_format) {
pipe_hw          1056 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, fmt, src_flags,
pipe_hw          1059 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		if (pdpu->pipe_hw->ops.setup_cdp) {
pipe_hw          1073 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, cdp_cfg);
pipe_hw          1106 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			pdpu->pipe_hw && pdpu->pipe_hw->ops.setup_multirect)
pipe_hw          1107 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		pdpu->pipe_hw->ops.setup_multirect(pdpu->pipe_hw,
pipe_hw          1159 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		dpu_hw_sspp_destroy(pdpu->pipe_hw);
pipe_hw          1319 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	const struct dpu_sspp_cfg *cfg = pdpu->pipe_hw->cap;
pipe_hw          1488 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_hw = dpu_hw_sspp_init(pipe, kms->mmio, kms->catalog,
pipe_hw          1490 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (IS_ERR(pdpu->pipe_hw)) {
pipe_hw          1492 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		ret = PTR_ERR(pdpu->pipe_hw);
pipe_hw          1494 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	} else if (!pdpu->pipe_hw->cap || !pdpu->pipe_hw->cap->sblk) {
pipe_hw          1500 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->features = pdpu->pipe_hw->cap->features;
pipe_hw          1501 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_sblk = pdpu->pipe_hw->cap->sblk;
pipe_hw          1557 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (pdpu && pdpu->pipe_hw)
pipe_hw          1558 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		dpu_hw_sspp_destroy(pdpu->pipe_hw);