pipe_bpp         1258 drivers/gpu/drm/i915/display/icl_dsi.c 	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
pipe_bpp          263 drivers/gpu/drm/i915/display/intel_audio.c 	if (crtc_state->pipe_bpp == 36) {
pipe_bpp          266 drivers/gpu/drm/i915/display/intel_audio.c 	} else if (crtc_state->pipe_bpp == 30) {
pipe_bpp          408 drivers/gpu/drm/i915/display/intel_crt.c 		if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
pipe_bpp          413 drivers/gpu/drm/i915/display/intel_crt.c 		pipe_config->pipe_bpp = 24;
pipe_bpp         1470 drivers/gpu/drm/i915/display/intel_ddi.c 	else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24)
pipe_bpp         1471 drivers/gpu/drm/i915/display/intel_ddi.c 		dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp;
pipe_bpp         1712 drivers/gpu/drm/i915/display/intel_ddi.c 	switch (crtc_state->pipe_bpp) {
pipe_bpp         1726 drivers/gpu/drm/i915/display/intel_ddi.c 		MISSING_CASE(crtc_state->pipe_bpp);
pipe_bpp         1781 drivers/gpu/drm/i915/display/intel_ddi.c 	switch (crtc_state->pipe_bpp) {
pipe_bpp         3853 drivers/gpu/drm/i915/display/intel_ddi.c 		pipe_config->pipe_bpp = 18;
pipe_bpp         3856 drivers/gpu/drm/i915/display/intel_ddi.c 		pipe_config->pipe_bpp = 24;
pipe_bpp         3859 drivers/gpu/drm/i915/display/intel_ddi.c 		pipe_config->pipe_bpp = 30;
pipe_bpp         3862 drivers/gpu/drm/i915/display/intel_ddi.c 		pipe_config->pipe_bpp = 36;
pipe_bpp         3913 drivers/gpu/drm/i915/display/intel_ddi.c 	    pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
pipe_bpp         3928 drivers/gpu/drm/i915/display/intel_ddi.c 			      pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
pipe_bpp         3929 drivers/gpu/drm/i915/display/intel_ddi.c 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
pipe_bpp         7275 drivers/gpu/drm/i915/display/intel_display.c 					   pipe_config->pipe_bpp);
pipe_bpp         7279 drivers/gpu/drm/i915/display/intel_display.c 	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,
pipe_bpp         7286 drivers/gpu/drm/i915/display/intel_display.c 	if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) {
pipe_bpp         7287 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp -= 2*3;
pipe_bpp         7289 drivers/gpu/drm/i915/display/intel_display.c 			      pipe_config->pipe_bpp);
pipe_bpp         7314 drivers/gpu/drm/i915/display/intel_display.c 	if (crtc_state->pipe_bpp > 24)
pipe_bpp         8298 drivers/gpu/drm/i915/display/intel_display.c 		if (crtc_state->dither && crtc_state->pipe_bpp != 30)
pipe_bpp         8302 drivers/gpu/drm/i915/display/intel_display.c 		switch (crtc_state->pipe_bpp) {
pipe_bpp         8794 drivers/gpu/drm/i915/display/intel_display.c 			pipe_config->pipe_bpp = 18;
pipe_bpp         8797 drivers/gpu/drm/i915/display/intel_display.c 			pipe_config->pipe_bpp = 24;
pipe_bpp         8800 drivers/gpu/drm/i915/display/intel_display.c 			pipe_config->pipe_bpp = 30;
pipe_bpp         9396 drivers/gpu/drm/i915/display/intel_display.c 	switch (crtc_state->pipe_bpp) {
pipe_bpp         9456 drivers/gpu/drm/i915/display/intel_display.c 	switch (crtc_state->pipe_bpp) {
pipe_bpp         9470 drivers/gpu/drm/i915/display/intel_display.c 		MISSING_CASE(crtc_state->pipe_bpp);
pipe_bpp         9968 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp = 18;
pipe_bpp         9971 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp = 24;
pipe_bpp         9974 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp = 30;
pipe_bpp         9977 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp = 36;
pipe_bpp         11903 drivers/gpu/drm/i915/display/intel_display.c 	if (bpp < pipe_config->pipe_bpp) {
pipe_bpp         11908 drivers/gpu/drm/i915/display/intel_display.c 			      pipe_config->pipe_bpp);
pipe_bpp         11910 drivers/gpu/drm/i915/display/intel_display.c 		pipe_config->pipe_bpp = bpp;
pipe_bpp         11934 drivers/gpu/drm/i915/display/intel_display.c 	pipe_config->pipe_bpp = bpp;
pipe_bpp         12096 drivers/gpu/drm/i915/display/intel_display.c 		      pipe_config->pipe_bpp, pipe_config->dither);
pipe_bpp         12310 drivers/gpu/drm/i915/display/intel_display.c 	base_bpp = pipe_config->pipe_bpp;
pipe_bpp         12402 drivers/gpu/drm/i915/display/intel_display.c 	pipe_config->dither = (pipe_config->pipe_bpp == 6*3) &&
pipe_bpp         12405 drivers/gpu/drm/i915/display/intel_display.c 		      base_bpp, pipe_config->pipe_bpp, pipe_config->dither);
pipe_bpp         12831 drivers/gpu/drm/i915/display/intel_display.c 		PIPE_CONF_CHECK_I(pipe_bpp);
pipe_bpp          859 drivers/gpu/drm/i915/display/intel_display_types.h 	int pipe_bpp;
pipe_bpp         1874 drivers/gpu/drm/i915/display/intel_dp.c 	bpp = pipe_config->pipe_bpp;
pipe_bpp         1968 drivers/gpu/drm/i915/display/intel_dp.c 					pipe_config->pipe_bpp = bpp;
pipe_bpp         2004 drivers/gpu/drm/i915/display/intel_dp.c 	int pipe_bpp;
pipe_bpp         2016 drivers/gpu/drm/i915/display/intel_dp.c 	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc);
pipe_bpp         2017 drivers/gpu/drm/i915/display/intel_dp.c 	if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) {
pipe_bpp         2027 drivers/gpu/drm/i915/display/intel_dp.c 	pipe_config->pipe_bpp = pipe_bpp;
pipe_bpp         2034 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp);
pipe_bpp         2057 drivers/gpu/drm/i915/display/intel_dp.c 							       pipe_config->pipe_bpp);
pipe_bpp         2078 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp,
pipe_bpp         2086 drivers/gpu/drm/i915/display/intel_dp.c 		      pipe_config->pipe_bpp,
pipe_bpp         2165 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp,
pipe_bpp         2176 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp);
pipe_bpp         2180 drivers/gpu/drm/i915/display/intel_dp.c 						     pipe_config->pipe_bpp),
pipe_bpp         2231 drivers/gpu/drm/i915/display/intel_dp.c 		return crtc_state->pipe_bpp != 18 &&
pipe_bpp         2317 drivers/gpu/drm/i915/display/intel_dp.c 		output_bpp = intel_dp_output_bpp(pipe_config, pipe_config->pipe_bpp);
pipe_bpp         3206 drivers/gpu/drm/i915/display/intel_dp.c 	    pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
pipe_bpp         3221 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
pipe_bpp         3222 drivers/gpu/drm/i915/display/intel_dp.c 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
pipe_bpp         4460 drivers/gpu/drm/i915/display/intel_dp.c 	switch (crtc_state->pipe_bpp) {
pipe_bpp         4474 drivers/gpu/drm/i915/display/intel_dp.c 		MISSING_CASE(crtc_state->pipe_bpp);
pipe_bpp           61 drivers/gpu/drm/i915/display/intel_dp_mst.c 		crtc_state->pipe_bpp = bpp;
pipe_bpp           64 drivers/gpu/drm/i915/display/intel_dp_mst.c 						       crtc_state->pipe_bpp);
pipe_bpp           79 drivers/gpu/drm/i915/display/intel_dp_mst.c 	intel_link_compute_m_n(crtc_state->pipe_bpp,
pipe_bpp          139 drivers/gpu/drm/i915/display/intel_dp_mst.c 	limits.max_bpp = min(pipe_config->pipe_bpp, 24);
pipe_bpp          913 drivers/gpu/drm/i915/display/intel_hdmi.c static bool gcp_default_phase_possible(int pipe_bpp,
pipe_bpp          918 drivers/gpu/drm/i915/display/intel_hdmi.c 	switch (pipe_bpp) {
pipe_bpp         1008 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (crtc_state->pipe_bpp > 24)
pipe_bpp         1012 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (gcp_default_phase_possible(crtc_state->pipe_bpp,
pipe_bpp         1738 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (crtc_state->pipe_bpp > 24)
pipe_bpp         1908 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (pipe_config->pipe_bpp > 24 &&
pipe_bpp         1954 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (pipe_config->pipe_bpp > 24) {
pipe_bpp         1966 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (pipe_config->pipe_bpp > 24) {
pipe_bpp         2209 drivers/gpu/drm/i915/display/intel_hdmi.c 	if (crtc_state->pipe_bpp < bpc * 3)
pipe_bpp         2387 drivers/gpu/drm/i915/display/intel_hdmi.c 		pipe_config->pipe_bpp = desired_bpp;
pipe_bpp          291 drivers/gpu/drm/i915/display/intel_lvds.c 		if (pipe_config->dither && pipe_config->pipe_bpp == 18)
pipe_bpp          410 drivers/gpu/drm/i915/display/intel_lvds.c 	if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
pipe_bpp          412 drivers/gpu/drm/i915/display/intel_lvds.c 			      pipe_config->pipe_bpp, lvds_bpp);
pipe_bpp          413 drivers/gpu/drm/i915/display/intel_lvds.c 		pipe_config->pipe_bpp = lvds_bpp;
pipe_bpp          443 drivers/gpu/drm/i915/display/intel_panel.c 	if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
pipe_bpp         1283 drivers/gpu/drm/i915/display/intel_sdvo.c 	pipe_config->pipe_bpp = 8*3;
pipe_bpp         1205 drivers/gpu/drm/i915/display/intel_tv.c 	pipe_config->pipe_bpp = 8*3;
pipe_bpp          382 drivers/gpu/drm/i915/display/intel_vdsc.c 	vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3;
pipe_bpp          290 drivers/gpu/drm/i915/display/vlv_dsi.c 		pipe_config->pipe_bpp = 24;
pipe_bpp          292 drivers/gpu/drm/i915/display/vlv_dsi.c 		pipe_config->pipe_bpp = 18;
pipe_bpp         1063 drivers/gpu/drm/i915/display/vlv_dsi.c 	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
pipe_bpp         2740 drivers/gpu/drm/i915/i915_debugfs.c 			   yesno(pipe_config->dither), pipe_config->pipe_bpp);