pin_sel_reg       262 arch/mips/ar7/gpio.c 	u32 mux_status, pin_sel_reg, tmp;
pin_sel_reg       269 arch/mips/ar7/gpio.c 	pin_sel_reg = gpio_cfg.reg - 1;
pin_sel_reg       271 arch/mips/ar7/gpio.c 	mux_status = (readl(pin_sel + pin_sel_reg) >> gpio_cfg.shift) & 0x3;
pin_sel_reg       278 arch/mips/ar7/gpio.c 	tmp = readl(pin_sel + pin_sel_reg);
pin_sel_reg       280 arch/mips/ar7/gpio.c 	writel(tmp, pin_sel + pin_sel_reg);