pin_flags         386 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	u64 pin_flags;
pin_flags         389 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags = vma->node.start;
pin_flags         391 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags = entry->offset & PIN_OFFSET_MASK;
pin_flags         393 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED;
pin_flags         395 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= PIN_GLOBAL;
pin_flags         397 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags)))
pin_flags         585 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	u64 pin_flags;
pin_flags         588 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	pin_flags = PIN_USER | PIN_NONBLOCK;
pin_flags         590 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= PIN_GLOBAL;
pin_flags         597 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= PIN_ZONE_4G;
pin_flags         600 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= PIN_MAPPABLE;
pin_flags         603 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= entry->offset | PIN_OFFSET_FIXED;
pin_flags         604 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */
pin_flags         606 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
pin_flags         611 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 			   pin_flags);
pin_flags          28 drivers/soc/fsl/qe/gpio.c 	unsigned long pin_flags[QE_PIO_PINS];
pin_flags         195 drivers/soc/fsl/qe/gpio.c 	if (test_and_set_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[err]) == 0) {
pin_flags         229 drivers/soc/fsl/qe/gpio.c 	test_and_clear_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[pin]);